Abstract: A bulk acoustic wave resonator includes a substrate, a resonator section in which a piezoelectric film is sandwiched between a pair of electrodes, and a vibration region where the electrodes overlap when viewed in a film thickness direction is defined, an elastically deformable support section that connects the substrate and the resonator section, a membrane arranged between the resonator section and the substrate to face the vibration region of the resonator section and be fixed on the substrate with a space in between, and driver sections that are defined in the resonator section and the substrate adjacent to the vibration region and the membrane, and that move the resonator section toward and away from the substrate. The vibration region of the resonator section contacts the membrane when the driver sections move the resonator section close to the substrate.

Abstract: A bulk acoustic wave resonator includes a substrate, a resonator section in which a piezoelectric film is sandwiched between a pair of electrodes, and a vibration region where the electrodes overlap when viewed in a film thickness direction is defined, an elastically deformable support section that connects the substrate and the resonator section, a membrane arranged between the resonator section and the substrate to face the vibration region of the resonator section and be fixed on the substrate with a space in between, and driver sections that are defined in the resonator section and the substrate adjacent to the vibration region and the membrane, and that move the resonator section toward and away from the substrate. The vibration region of the resonator section contacts the membrane when the driver sections move the resonator section close to the substrate.

Abstract: An inductor includes a first air-bridge section and a second air-bridge section. The first air-bridge unit extends in a floating location over a substrate between a plurality of support locations on the substrate. The second air-bridge unit extends in a floating location over the first air-bridge unit between a plurality of support locations on the first air-bridge unit. This arrangement enables the first and second air-bridge sections to be connected in parallel, thus branching a flowing current. Thus, the conductor loss in each of the first and second air-bridge sections is reduced.

Abstract: An inductor includes a first air-bridge section and a second air-bridge section. The first air-bridge unit extends in a floating location over a substrate between a plurality of support locations on the substrate. The second air-bridge unit extends in a floating location over the first air-bridge unit between a plurality of support locations on the first air-bridge unit. This arrangement enables the first and second air-bridge sections to be connected in parallel, thus branching a flowing current. Thus, the conductor loss in each of the first and second air-bridge sections is reduced.

Abstract: The field-effect semiconductor device includes a channel layer; a contact layer; a semiconductor structure having an electron-affinity different from those of the channel layer and the contact layer and formed between the channel layer and the contact layer; an ohmic electrode formed on the contact layer; and a Schottky electrode formed on the semiconductor structure. The junction face between the channel layer and the semiconductor structure and the junction face between the contact layer and the semiconductor structure are iso-type heterojunctions.

Abstract: A heterojunction field effect transistor operative from the micro wave band to the millimeter wave band has a gate recess structure formed in a manner such that its eye-empty areas have a significant effect on the voltage durability of the transistor. The eye-empty areas extend from a gate electrode to a source electrode as well as to a drain electrode and are formed by at least two material layers having different impurity concentrations, thereby making it possible to obtain an improved heterojunction field effect transistor having a reduced series resistance and an increased voltage durability.

Abstract: A gate electrode is formed in the following manner. A first resist layer having a first opening is formed on a semiconductor substrate. A second resist layer having a second opening larger than the first opening is formed on the first resist layer. A first conductor layer containing a high-melting-point metal is formed. Subsequently, a second conductor layer containing low-resistance metal is formed, and then the first conductor layer within the second opening is removed by etching. Next, the second resist layer is removed by a lift-off process, and finally the first resist layer is removed by ashing.

Abstract: A fine electrode-forming masking member for forming fine gate electrodes, which can decrease gate length of a gate electrode of a field effect transistor. The method includes forming a first masking member having penetrating portions formed into opening patterns in conformity with the fine gate electrodes, on a semiconductor substrate using a photosensitive resin; and heating the first masking member so that parts of sidewalk in contact with the substrate of the penetrating portions flow along the semiconductor substrate to form extension portions. Accordingly, the widths of the penetrating portions at the bottom surface side are decreased so as to form the opening patterns. Gate electrodes are formed on regions of the semiconductor substrate exposed through the opening patterns while the substrate is masked with the fine electrode-forming masking member.

Abstract: A field-effect semiconductor device includes a channel layer; a barrier structure formed on the channel layer and including a plurality of semiconductor layers; a plurality of ohmic electrodes formed above the barrier structure; and a Schottky electrode formed on the barrier structure between the ohmic electrodes. The barrier structure has an electron-affinity less than that of the channel layer and includes at least two heavily doped layers and a lightly doped layer provided therebetween.

Abstract: A method for manufacturing a fine electrode-forming masking member for forming fine gate electrodes, which is effectively used to decrease a gate length of a gate electrode of a field effect transistor. The method includes forming a first masking member having penetrating portions formed into opening patterns in conformity with the fine gate electrodes, on a semiconductor substrate using a photosensitive resin; and performing heat treatment of the first masking member so that parts of sidewalls, which are in contact with the substrate, of the penetrating portions formed in the first masking member, are caused by the heat treatment to flow along the semiconductor substrate to form extension portions. Accordingly, the widths of the penetrating portions at the bottom surface side are decreased so as to form the opening patterns.

Abstract: A gate electrode is formed in the following manner. A first resist layer having a first opening is formed on a semiconductor substrate. A second resist layer having a second opening larger than the first opening is formed on the first resist layer. A first conductor layer containing a high-melting-point metal is formed. Subsequently, a second conductor layer containing low-resistance metal is formed, and then the first conductor layer within the second opening is removed by etching. Next, the second resist layer is removed by a lift-off process, and finally the first resist layer is removed by ashing.

Abstract: A heterojunction field-effect transistor having a high breakdown voltage and a low series resistance during operation suitable for use in microwave and millimeter-wave band oscillators and power amplifiers is provided. The heterojunction field-effect transistor has a gate recess structure and includes a gate electrode, a barrier layer, a contact layer, and a recess layer formed between the barrier layer and the contact layer. The recess layer is constituted from a plurality of recess sublayers, and the carrier density of the lowermost sublayer of the recess sublayers is ⅓ to 3 times the carrier density of the other recess sublayers.

Abstract: A heterojunction field effect transistor operative from the micro wave band to the millimeter wave band has a gate recess structure formed in a manner such that its eye-empty areas have a significant effect on the voltage durability of the transistor. The eye-empty areas extend from a gate electrode to a source electrode as well as to a drain electrode and are formed by at least two material layers having different impurity concentrations, thereby making it possible to obtain an improved heterojunction field effect transistor having a reduced series resistance and an increased voltage durability.

Abstract: A semiconductor device includes an element formed on a first surface of a semiconductor substrate, a via-hole passing through the semiconductor substrate from the first surface to a second surface of the semiconductor substrate, and an electrode formed on the inner wall of the via-hole, the electrode passing through the semiconductor substrate from the first surface to the second surface. The electrode in the via-hole is electrically connected to at least one electrode of the element; the semiconductor substrate is mounted on a surface mount board; and the electrode formed on the inner wall of the via-hole is electrically connected to an electrode of the surface mount board by a conductive bonding material, such as a conductive adhesive. A method for fabricating the semiconductor device is also disclosed.

Abstract: A semiconductor device includes an element formed on a first surface of a semiconductor substrate, a via-hole passing through the semiconductor substrate from the first surface to a second surface of the semiconductor substrate, and an electrode formed on the inner wall of the via-hole, the electrode passing through the semiconductor substrate from the first surface to the second surface. The electrode in the via-hole is electrically connected to at least one electrode of the element; the semiconductor substrate is mounted on a surface mount board; and the electrode formed on the inner wall of the via-hole is electrically connected to an electrode of the surface mount board by a conductive bonding material, such as a conductive adhesive. A method for fabricating the semiconductor device is also disclosed.

Abstract: A method for forming a resist pattern includes the steps of: forming a dummy pattern on a semiconductor substrate using one type of a photosensitive resist; applying a resist mask on the semiconductor substrate so as to bury the dummy pattern using an opposite type of a photosensitive resist; forming a mixing layer at the interface between the dummy pattern and the resist mask by applying a heat treatment; and dissolving and removing the dummy pattern with an etchant in which the mixing layer and the resist mask are indissoluble so as to form an opening having a space width smaller than a width of the dummy pattern in the resist mask.

Abstract: A heterostructure insulated-gate field effect transistor comprises a channel layer, barrier layer and a contact layer. The barrier layer is made of a material having an electron affinity smaller than that of the channel layer and equal to that of the contact layer. Due to the single heterostructure, the series resistance between the channel layer and the source (drain) electrode can be decreased without employing complicated selective ion implanting or selective epitaxial growing method.