Abstract: An equivalence verification unit (130) judges through equivalence verification, for each of corresponding combinations which are each a combination of a function included in pre-change source code and a function included in post-change source code, whether the functions included in the corresponding combination are equivalent to each other. A partial verification judgment unit (150) judges, for each of inequivalent ones of the corresponding combinations, whether the corresponding combination is a partial verification combination including a function where an inequivalent path, in which an inequivalent function is called, and a non-inequivalent path, in which a non-inequivalent function is called, are both included. A partial verification unit (160) judges, for each of the partial verification combinations, whether the functions included in the partial verification combination are partially equivalent to each other by excluding the inequivalent path and performing the equivalence verification.

Abstract: A generation unit generates an inspection wrapper for inspecting equivalence of a first function and a second function. The inspection wrapper includes a loop statement for repeatedly calling the first function and the second function. An inspection unit determines equivalence of the first function and the second function for each calling time number where the first function and the second function are called, by conducting equivalence inspection using the inspection wrapper.

Abstract: A non-equivalence set extraction unit (120) extracts, from a target set list, a non-equivalence set being a target set that does not satisfy a condition that an output of an after-change target function is coincident with an output of a before-change target function when a same input is provided to both of the before-change target function and the after-change target function. A test case selection unit (140) selects, from a plurality of test cases, a test case wherein the before-change target function included in the non-equivalence set is called, as an important test case.

Abstract: An equivalence verification unit (130) judges through equivalence verification, for each of corresponding combinations which are each a combination of a function included in pre-change source code and a function included in post-change source code, whether the functions included in the corresponding combination are equivalent to each other. A partial verification judgment unit (150) judges, for each of inequivalent ones of the corresponding combinations, whether the corresponding combination is a partial verification combination including a function where an inequivalent path, in which an inequivalent function is called, and a non-inequivalent path, in which a non-inequivalent function is called, are both included. A partial verification unit (160) judges, for each of the partial verification combinations, whether the functions included in the partial verification combination are partially equivalent to each other by excluding the inequivalent path and performing the equivalence verification.

Abstract: A division unit (110) divides, for each of a first program (61) before a change and a second program (62) after the change, each of a plurality of control processings therein into a concurrency processing and a functional sequential processing, for output as a first divided program (71) and a second divided program (72). When a functional defect is detected, a cause estimation unit (150) estimates the functional sequential processing that is different between the first divided program (71) and the second divided program (72) as the cause of the functional defect. When a defect is detected as a concurrency defect, the cause estimation unit (150) estimates the concurrency processing that is different between the first divided program (71) and the second divided program (72) as the cause of the concurrency defect.

Abstract: Using, as a target pattern, each of combinations of a plurality of input conditions, a plurality of output conditions, and a plurality of arrival points each at which attainment of a process is confirmed by a test method based on a software structure, a test case generation apparatus determines whether or not generation of a test case is possible. The test case is formed of values of input and output signals and enables simultaneous checking of an arrival point and an input-output condition being a pair of an input condition and an output condition in the target pattern. With this arrangement, the test case generation apparatus identifies a set of the test cases that enable checking of each of the plurality of input conditions, each of the plurality of output conditions, and each of the plurality of arrival points.

Abstract: Control information from a plurality of applications 1000 is written into a shared memory 101 as needed. A communication part 105 transmits the control information written in the shared memory 101 to a DHM 200 in each transmission cycle which is constant. In a management table, a plurality of allowable delay times is defined, the allowable delay time being a delay time allowable at an urgent transmission of the control information. A transmission timing notification part 106 divides a transmission cycle into time slots each of which is equal to or shorter than the shortest allowable delay time defined in the management table. The communication part 105 transmits the control information in the shared memory 101 to the DHM 200 before arrival of the transmission cycle, in a unit of time slot.

Abstract: Control information from a plurality of applications 1000 is written into a shared memory 101 as needed. A communication part 105 transmits the control information written in the shared memory 101 to a DHM 200 in each transmission cycle which is constant. In a management table, a plurality of allowable delay times is defined, the allowable delay time being a delay time allowable at an urgent transmission of the control information. A transmission timing notification part 106 divides a transmission cycle into time slots each of which is equal to or shorter than the shortest allowable delay time defined in the management table. The communication part 105 transmits the control information in the shared memory 101 to the DHM 200 before arrival of the transmission cycle, in a unit of time slot.

Abstract: A communication unit receives from a BCM output data which is data to I/O devices from the BCM. A shared memory stores the output data received by the communication unit. An anomaly detection communication processing unit and the communication unit generate a communication frame for anomaly detection to request sending the output data held in the BCM. The communication unit sends the communication frame for the anomaly detection to the BCM, and receives the output data held in the BCM from the BCM as a response to the communication frame for the anomaly detection. The anomaly detection checking unit compares the output data received from the BCM with the output data stored in the shared memory.