Patents by Inventor Makoto Kosaki
Makoto Kosaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9929231Abstract: An electronic component includes a body part and a via part. The body part includes first and second metal layers disposed with at least one dielectric layer interposed therebetween. The via part is disposed in the body part and includes first and second vias penetrating through the body part and selectively connected to the first and second metal layers, respectively. The first and second metal layers contain different metals. In some examples, a first insulating film is disposed between the first metal layer and the second via to electrically insulate the second via from the first metal layer, and a second insulating film is disposed between the second metal layer and the first via to electrically insulate the first via from the second metal layer. A method for forming the electronic component includes use of first and second etchants to selectively etch the first and second metal layers.Type: GrantFiled: August 30, 2016Date of Patent: March 27, 2018Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Hai Joon Lee, Makoto Kosaki, Ji Hyun Park, Jong Bong Lim
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Publication number: 20170194419Abstract: An electronic component includes a body part and a via part. The body part includes first and second metal layers disposed with at least one dielectric layer interposed therebetween. The via part is disposed in the body part and includes first and second vias penetrating through the body part and selectively connected to the first and second metal layers, respectively. The first and second metal layers contain different metals. In some examples, a first insulating film is disposed between the first metal layer and the second via to electrically insulate the second via from the first metal layer, and a second insulating film is disposed between the second metal layer and the first via to electrically insulate the first via from the second metal layer. A method for forming the electronic component includes use of first and second etchants to selectively etch the first and second metal layers.Type: ApplicationFiled: August 30, 2016Publication date: July 6, 2017Inventors: Hai Joon LEE, Makoto KOSAKI, Ji Hyun PARK, Jong Bong LIM
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Patent number: 9143322Abstract: A communication apparatus includes a storage part configured to store a first key generated according to authentication with a transmission source, identification information of the transmission source, and first information remaining unchanged regardless of the initialization of a coupling status and corresponding to the transmission source, with the first key, the identification information and the first information mapped to each other, an acquisition part configured to acquire a public key from the transmission source holding the identification information responsive to the first information stored on the storage part if the identification information of the transmission source has changed in response to the initialization of the coupling status, and a calculation part configured to generate an encryption key for use in encryption and decryption of data transmitted by the transmission source, based on the first key responsive to the first information, and the public key.Type: GrantFiled: October 27, 2009Date of Patent: September 22, 2015Assignee: Cypress Semiconductor CorporationInventor: Makoto Kosaki
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Patent number: 8230297Abstract: An error correction device for reducing the amount of access to an external memory while preventing the capacity of an internal memory from increasing. An optical disc stores scramble data for each data block. A descramble circuit reads scramble data in the data blocks from the optical disc as read blocks and applies a predetermined scramble value to the scramble data of each read block to generate descramble data. A 1-shift calculator generates a first calculated value by shifting the scramble value by one byte using a generation polynomial. A second shift calculator generates a second calculated value by shifting the scramble value by a number of bytes corresponding to {(total bytes of the data block in the column direction)+1?(total bytes of each read block in the column direction)} using the generation polynomial. An EOR circuit generates descramble data by applying the first or second calculated value as the scramble value to the input scramble data.Type: GrantFiled: July 30, 2008Date of Patent: July 24, 2012Assignee: Fujitsu Semiconductor LimitedInventors: Makoto Kosaki, Kazuki Usui
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Publication number: 20100161989Abstract: A communication apparatus includes a storage part configured to store a first key generated according to authentication with a transmission source, identification information of the transmission source, and first information remaining unchanged regardless of the initialization of a coupling status and corresponding to the transmission source, with the first key, the identification information and the first information mapped to each other, an acquisition part configured to acquire a public key from the transmission source holding the identification information responsive to the first information stored on the storage part if the identification information of the transmission source has changed in response to the initialization of the coupling status, and a calculation part configured to generate an encryption key for use in encryption and decryption of data transmitted by the transmission source, based on the first key responsive to the first information, and the public key.Type: ApplicationFiled: October 27, 2009Publication date: June 24, 2010Applicant: FUJITSU MICROELECTRONICS LIMITEDInventor: Makoto KOSAKI
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Publication number: 20090037796Abstract: An error correction device for reducing the amount of access to an external memory while preventing the capacity of an internal memory from increasing. An optical disc stores scramble data for each data block. A descramble circuit reads scramble data in the data blocks from the optical disc as read blocks and applies a predetermined scramble value to the scramble data of each read block to generate descramble data. A 1-shift calculator generates a first calculated value by shifting the scramble value by one byte using a generation polynomial. A second shift calculator generates a second calculated value by shifting the scramble value by a number of bytes corresponding to {(total bytes of the data block in the column direction)+1?(total bytes of each read block in the column direction)} using the generation polynomial. An EOR circuit generates descramble data by applying the first or second calculated value as the scramble value to the input scramble data.Type: ApplicationFiled: July 30, 2008Publication date: February 5, 2009Applicant: FUJITSU LIMITEDInventors: Makoto KOSAKI, Kazuki USUI
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Publication number: 20080201619Abstract: There is provided an error correcting device, including: a demodulation circuit that reads data from an optical disk and demodulates the data to generate demodulated data; a PI syndrome generation circuit that generates a PI syndrome of the demodulated data and outputs the PI syndrome to an external memory; a PO syndrome generation circuit that generates a PO syndrome of the demodulated data and outputs the PO syndrome to the external memory; and an error correcting circuit that reads the PI syndrome and the PO syndrome from the external memory and performs error correction on the demodulated data stored in the external memory, based on the syndromes.Type: ApplicationFiled: February 12, 2008Publication date: August 21, 2008Applicant: FUJITSU LIMITEDInventor: Makoto Kosaki
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Publication number: 20050166050Abstract: It is an object to provide an encoded data receiving device and a method for updating a decoding key represented by DTCP standards capable of eliminating shifts in update timings of the public key NC between a data receiving device and a data transmitting device without increasing the amount of packets for inquiries between both devices. In the check portion, success or failure in data decoding is checked on the basis of fixed information that are disposed at specified bit positions of decoded data. In the determination portion, when check results indicating that decoding of data has failed are consecutively output by the check portion by a specified number of times, a determination signal indicating that update of the decoding key following update of the encoding key of the data transmitting device has failed is output whereupon a calculating portion performs update of the decoding key on the basis of the determination signal.Type: ApplicationFiled: March 25, 2005Publication date: July 28, 2005Inventor: Makoto Kosaki
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Publication number: 20050055311Abstract: An encryption device includes an encryption/decryption circuit for encrypting and decrypting data with a secret key. A non-volatile memory is connected to the encryption/decryption circuit to store the secret key in an encrypted state. The encryption/decryption circuit receives the encrypted secret key from the non-volatile memory and decrypts the encrypted secret key to generate the secret key.Type: ApplicationFiled: January 31, 2003Publication date: March 10, 2005Inventor: Makoto Kosaki
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Patent number: 6687804Abstract: A data management system includes a computer and memory devices. The memory devices can be configured such that their memory areas form a continuous memory area. Each memory device includes a memory area for storing memory configuration information, including information on whether the memory area of the memory device is to be used to form the continuous memory area. Memory devices may be connected to and disconnected from the system without stopping operation of the system. When a memory device is disconnected from the system or a new memory device is connected to the system, the system reforms the continuous memory area based on the memory configuration information stored in each memory device. The system further determines whether data previously stored in the memory devices can be used by the system.Type: GrantFiled: September 18, 2000Date of Patent: February 3, 2004Assignee: Fujitsu LimitedInventor: Makoto Kosaki
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Patent number: 5499442Abstract: A delay line device having first and second substrates. The first substrate has a signal line centrally formed on one of main surfaces of a ceramic substrate, bonding electrodes formed in a peripheral portion of the main surface and a ground electrode formed over substantially the entire region of the other main surface thereof. The second substrate has bonding electrodes formed on one of main surfaces of the ceramic substrate identical in thickness and material to the ceramic substrate and a ground electrode formed over substantially the entire region of the other main surface thereof. The delay line device is formed by superimposing the first and second substrates on one another so that the bonding electrodes of the first substrate face those of the second substrate and bonding the bonding electrodes of both substrates to one another. Such delay line devices can be manufactured using mother substrates and mother dummy substrates.Type: GrantFiled: July 7, 1994Date of Patent: March 19, 1996Assignee: Susumu Co., Ltd.Inventors: Nakaba Nakamura, Makoto Kosaki
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Patent number: 5365203Abstract: A delay line device comprises first and second substrates. The first substrate has a signal line centrally formed on one of main surfaces of a ceramic substrate, bonding electrodes formed in a peripheral portion of the main surface and a ground electrode formed over substantially the entire region of the other main surface thereof. The second substrate has bonding electrodes formed on one of main surfaces of a ceramic substrate identical in thickness and material to the above ceramic substrate and a ground electrode formed over substantially the entire region of the other main surface thereof. The delay line device is formed by superimposing the first and second substrates on one another so that the bonding electrodes of the first substrate face those of the second substrate and bonding the bonding electrodes of both substrates to one another. Such delay line devices can be manufactured using mother substrates and mother dummy substrates.Type: GrantFiled: October 25, 1993Date of Patent: November 15, 1994Assignee: Susumu Co., Ltd.Inventors: Nakaba Nakamura, Makoto Kosaki