Abstract: A current driving device comprises: a voltage supply part; a current supply part; and a plurality of current output parts, each comprising a current-voltage converting function, a voltage-current converting function, and a voltage holding capacitance element. The current output part takes three operation modes. Under a voltage supply mode, the current output part receives a voltage from the voltage supply part and holds the voltage in the voltage holding capacitance element. Under a current supply mode, the current output part receives the current from the current supply part, generates a second voltage by the current-voltage converting function and holds the voltage in the voltage holding capacitance element. Under a current output part, the current output part outputs an output current according to the voltage held in the voltage holding capacitance element by the voltage-current converting function.

Abstract: A current driving circuit includes: a reference input terminal to which a first reference current is given; a current mirror circuit for receiving the first reference current and outputting a first internal current corresponding to the first reference current; a bias voltage generation section for receiving the first internal current and generating a bias voltage corresponding to the first internal current; an output reference current generation section for receiving the bias voltage and generating a second reference current corresponding to the bias voltage; a reference current output terminal for outputting the second reference current; an internal current generation transistor for receiving at a gate thereof the bias voltage and generating a second internal current corresponding to the bias voltage; and an output current generation section for receiving the second internal current and generating n output currents corresponding to the second internal current.

Abstract: The current drive device of the present invention includes: a current source transistor for allowing a preset drive current to flow to a drain; a cascode transistor cascode-connected to the current source transistor; a switch circuit for switching ON/OFF flow of the drive current through the drain of the cascode transistor and a circuit to be driven; and a bypass circuit for allowing the drive current to flow therethrough to bypass the switch circuit and the circuit to be driven when the switch circuit is OFF.

Abstract: In an offset cancellation circuit according to the present invention, a first capacitance is connected to a gate of a first transistor of a first active load, and a second capacitance is connected to a gate of a second transistor of the first active load. A switch sets a first time period and a second time period in connection states between the first and second transistors and the first and second capacitances. The connection states between the first and second transistors and the first and second capacitances are set so that a gate voltage of the first transistor is supplied to the first capacitance, and a gate voltage of the second transistor is supplied to the second capacitance during the first time period; and so that the first and second capacitances can retain charges, and the second time period becomes an output time period of the operational amplifier during the second time period.

Abstract: The first and second chips are provided side by side. The first chip includes: a current supply section for outputting a drive current, the current supply section including a current mirror; a current distribution MISFET; a current input MISFET for transmitting an electric current to the current supply section, the current input MISFET being connected to the current distribution MISFET; and a second current distribution MISFET. The current distribution MISFET and the second current distribution MISFET constitute a current mirror. The second chip includes a second current input MISFET which is connected to the second current distribution MISFET. The ratio between the W/L ratio of the current distribution MISFET and the W/L ratio of the current input MISFET connected thereto is the same in the first and second chips.

Abstract: In an offset cancellation circuit according to the present invention, a first capacitance is connected to a gate of a first transistor of a first active load, and a second capacitance is connected to a gate of a second transistor of the first active load. A switch sets a first time period and a second time period in connection states between the first and second transistors and the first and second capacitances. The connection states between the first and second transistors and the first and second capacitances are set so that a gate voltage of the first transistor is supplied to the first capacitance, and a gate voltage of the second transistor is supplied to the second capacitance during the first time period; and so that the first and second capacitances can retain charges, and the second time period becomes an output time period of the operational amplifier during the second time period.

Abstract: A current driving device includes a reference current source, a first MISFET connected to the reference current source, a plurality of current distribution MISFETs which constitutes a current mirror together with the first MISFET and distributes a reference current, a current input MISFET connected to the current distribution MISFETs, and a plurality of current supply sections each of which includes MISFETs constituting a current mirror circuit together with the current input MISFET and supplies a driving current for a pixel circuit. With the plurality of current distribution MISFETs provided, change in gate the potential of MISFETs in the current supply section can be suppressed, so that the generation of a crosstalk in a display device can be suppressed.

Abstract: A current drive circuit supplies a driving current to a pixel portion included in a current-driven display panel. A driving current generator includes an output terminal for supplying the driving current. A protective transistor has a drain connected to the pixel portion, a source connected to the output terminal, and a gate to which a first bias voltage is supplied. The first bias voltage has a voltage level lower than or equal to a voltage level obtained by adding the threshold voltage of the protective transistor to the breakdown voltage of the driving current generator.

Abstract: A current driving device comprises: a voltage supply part; a current supply part; and a plurality of current output parts, each comprising a current-voltage converting function, a voltage-current converting function, and a voltage holding capacitance element. The current output part takes three operation modes. Under a voltage supply mode, the current output part receives a voltage from the voltage supply part and holds the voltage in the voltage holding capacitance element. Under a current supply mode, the current output part receives the current from the current supply part, generates a second voltage by the current-voltage converting function and holds the voltage in the voltage holding capacitance element. Under a current output part, the current output part outputs an output current according to the voltage held in the voltage holding capacitance element by the voltage-current converting function.

Abstract: A current driver includes a gate line having a first and second nodes, K driving transistors, a terminal and a voltage generation section. The terminal receives a first current. The voltage generation section generates a bias voltage according to a current value of the first current. The gate line receives, at one of the first and second nodes, the bias voltage generated by the voltage generation section. Gates of the K transistors are connected between the first and second nodes of the gate line. In the voltage generation section, the relationship between the first current and the bias voltage is adjusted in the first mode, according to a current value of an output current flowing in a first driving transistor of the K driving transistors, and in the second mode, according to a current value of an output current flowing in a second driving transistor of the K driving transistors.

Abstract: The method includes the steps of: (a) supplying second digital data, in place of first digital data that should originally be supplied, to a current drive circuit to allow the current drive circuit to supply a drive current corresponding to the second digital data during a first time period; and (b) supplying, after step (a), the first digital data to the current drive circuit to allow the current drive circuit to supply a drive current corresponding to the first digital data during a second time period. In step (a), the digital value of the second digital data is determined based on the digital value of the first digital data so that write of a drive current corresponding to the first digital data into an circuit to be driven is completed with the supply of the drive currents during the first and second time periods.

Abstract: A current driver outputs an output current according to a reference current. The current driver includes: a current-voltage converter; a bias-voltage generating transistor; a differential amplifier; and a driving transistor. The converter has a given resistance value and is connected between a first node and a second node. The bias-voltage generating transistor is provided between the first and second nodes and connected in series with the converter. The amplifier outputs a voltage according to the difference between a voltage at an interconnecting node between the converter and the bias-voltage generating transistor and a voltage according to the reference current at a third node. The driving transistor is connected between an output current node outputting an output current and the second node and receives, at its gate, the voltage from the amplifier. The bias-voltage generating transistor receives, at its gate, the voltage from the amplifier.

Abstract: In a current driver, a gate of a first generating transistor, gates of K driving transistors, and a gate of a second generating transistor are connected to a gate line in this order. A first differential amplifier outputs a voltage determined according to the difference between a voltage from a first supply node and a voltage at the drain of the first generating transistor. A second differential amplifier outputs a voltage determined according to the difference between a voltage from a second supply node and a voltage at the drain of the second generating transistor. The gate of the first generating transistor receives the output of the first differential amplifier. The gate of the second generating transistor receives the output of the second differential amplifier.

Abstract: The current drive device of the present invention includes: a current source transistor for allowing a preset drive current to flow to a drain; a cascode transistor cascode-connected to the current source transistor; a switch circuit for switching ON/OFF flow of the drive current through the drain of the cascode transistor and a circuit to be driven; and a bypass circuit for allowing the drive current to flow therethrough to bypass the switch circuit and the circuit to be driven when the switch circuit is OFF.

Abstract: A current driving circuit includes: a reference input terminal to which a first reference current is given; a current mirror circuit for receiving the first reference current and outputting a first internal current corresponding to the first reference current; a bias voltage generation section for receiving the first internal current and generating a bias voltage corresponding to the first internal current; an output reference current generation section for receiving the bias voltage and generating a second reference current corresponding to the bias voltage; a reference current output terminal for outputting the second reference current; an internal current generation transistor for receiving at a gate thereof the bias voltage and generating a second internal current corresponding to the bias voltage; and an output current generation section for receiving the second internal current and generating n output currents corresponding to the second internal current.

Abstract: The first and second chips are provided side by side. The first chip includes: a current supply section for outputting a drive current, the current supply section including a current mirror; a current distribution MISFET; a current input MISFET for transmitting an electric current to the current supply section, the current input MISFET being connected to the current distribution MISFET; and a second current distribution MISFET. The current distribution MISFET and the second current distribution MISFET constitute a current mirror. The second chip includes a second current input MISFET which is connected to the second current distribution MISFET. The ratio between the W/L ratio of the current distribution MISFET and the W/L ratio of the current input MISFET connected thereto is the same in the first and second chips.

Abstract: The first and second chips are provided side by side. The first chip includes: a current supply section for outputting a drive current, the current supply section including a current mirror; a current distribution MISFET; a current input MISFET for transmitting an electric current to the current supply section, the current input MISFET being connected to the current distribution MISFET; and a second current distribution MISFET. The current distribution MISFET and the second current distribution MISFET constitute a current mirror. The second chip includes a second current input MISFET which is connected to the second current distribution MISFET. The ratio between the W/L ratio of the current distribution MISFET and the W/L ratio of the current input MISFET connected thereto is the same in the first and second chips.

Abstract: A current driver includes a gate line having a first and second nodes, K driving transistors, a terminal and a voltage generation section. The terminal receives a first current. The voltage generation section generates a bias voltage according to a current value of the first current. The gate line receives, at one of the first and second nodes, the bias voltage generated by the voltage generation section. Gates of the K transistors are connected between the first and second nodes of the gate line. In the voltage generation section, the relationship between the first current and the bias voltage is adjusted in the first mode, according to a current value of an output current flowing in a first driving transistor of the K driving transistors, and in the second mode, according to a current value of an output current flowing in a second driving transistor of the K driving transistors.

Abstract: In a current driver, a gate of a first generating transistor, gates of K driving transistors, and a gate of a second generating transistor are connected to a gate line in this order. A first differential amplifier outputs a voltage determined according to the difference between a voltage from a first supply node and a voltage at the drain of the first generating transistor. A second differential amplifier outputs a voltage determined according to the difference between a voltage from a second supply node and a voltage at the drain of the second generating transistor. The gate of the first generating transistor receives the output of the first differential amplifier. The gate of the second generating transistor receives the output of the second differential amplifier.

Abstract: A current driver outputs an output current according to a reference current. The current driver includes: a current-voltage converter; a bias-voltage generating transistor; a differential amplifier; and a driving transistor. The converter has a given resistance value and is connected between a first node and a second node. The bias-voltage generating transistor is provided between the first and second nodes and connected in series with the converter. The amplifier outputs a voltage according to the difference between a voltage at an interconnecting node between the converter and the bias-voltage generating transistor and a voltage according to the reference current at a third node. The driving transistor is connected between an output current node outputting an output current and the second node and receives, at its gate, the voltage from the amplifier. The bias-voltage generating transistor receives, at its gate, the voltage from the amplifier.