Abstract: To provide a semiconductor device with a digital-controlled DC-DC converter capable of stable feedback operation while minimizing area, the semiconductor device includes a DC-DC converter whose characteristic is determined by the control parameter, a flash memory and a processor that controls the flash memory, both of which operate at a power supply based on the output of the DC-DC converter. The control parameter is stored in the flash memory, and the control parameter is read out from the flash memory and set in the DC-DC converter by the processor while the DC-DC converter is operating.

Abstract: To provide a semiconductor device with a digital-controlled DC-DC converter capable of stable feedback operation while suppressing an increased area, the semiconductor device 10 includes a DC-DC converter 14 whose characteristic is determined by the control parameter 21, a flash memory 17 and a processor 18 that controls the flash memory 17, both of which operate at a power supply based on the output of the DC-DC converter 14. The control parameter 21 is stored in the flash memory 17, and the control parameter 21 is read out from the flash memory 17 and set in the DC-DC converter 14 by the processor 18 while the DC-DC converter 14 is operating.

Abstract: An assembled mandrel for forming a hollow structure having a shape similar to that of the assembled mandrel, by layering a prepreg on the surface of the longitudinally oriented assembled mandrel, covering the same with a vacuum bag, heating while creating a vacuum inside the vacuum bag, and heat-curing the prepreg while pressing the same into the assembled mandrel, the assembled mandrel being characterized by being equipped with: two outer mandrel members (first mandrel members) extending in the longitudinal direction; a center mandrel member (second mandrel member) sandwiched between the two outer mandrel members, and capable of being withdrawn in the lengthwise direction from between the two outer mandrel members after the hollow structure has been formed; and a tape (detachable member) formed from a low-friction material and adhered to one or more of the contact surfaces between the two outer mandrel members and the center mandrel member.

Abstract: An assembled mandrel for forming a hollow structure having a shape similar to that of the assembled mandrel, by layering a prepreg on the surface of the longitudinally oriented assembled mandrel, covering the same with a vacuum bag, heating while creating a vacuum inside the vacuum bag, and heat-curing the prepreg while pressing the same into the assembled mandrel, the assembled mandrel being characterized by being equipped with: two outer mandrel members (first mandrel members) extending in the longitudinal direction; a center mandrel member (second mandrel member) sandwiched between the two outer mandrel members, and capable of being withdrawn in the lengthwise direction from between the two outer mandrel members after the hollow structure has been formed; and a tape (detachable member) formed from a low-friction material and adhered to one or more of the contact surfaces between the two outer mandrel members and the center mandrel member.

Abstract: A design method for a semiconductor integrated circuit, includes: a first calculating step; a second calculating step; and a setting step. The first step is a step of calculating a consumption current amount of a layout target circuit based on circuit information. The second calculating step is a step of calculating a suppliable current amount per unit area in a region where a power can be supplied from a power wiring line. The setting step is a step of setting a cell size of the layout target circuit based on the consumption current amount so that a consumption current amount per unit area of the layout target circuit is smaller than the suppliable current amount per unit area.

Abstract: A method of designing a semiconductor device is provided. According to the method, a group of cells that is a target of clock distribution is placed. After the group of cells is placed, a plurality of clock driver cells for driving the clock are placed such that each clock driver cell is prohibited from overlapping with a prohibited region of a predetermined size surrounding another clock driver cell.

Abstract: A design method for a semiconductor integrated circuit, includes : a first calculating step; a second calculating step; and a setting step. The first step is a step of calculating a consumption current amount of a layout target circuit based on circuit information. The second calculating step is a step of calculating a suppliable current amount per unit area in a region where a power can be supplied from a power wiring line. The setting step is a step of setting a cell size of the layout target circuit based on the consumption current amount so that a consumption current amount per unit area of the layout target circuit is smaller than the suppliable current amount per unit area.

Abstract: A method of designing a semiconductor device is provided. According to the method, a group of cells that is a target of clock distribution is placed. After the group of cells is placed, a plurality of clock driver cells for driving the clock are placed such that each clock driver cell is prohibited from overlapping with a prohibited region of a predetermined size surrounding another clock driver cell.

Abstract: A clock input circuit 13 receives power during standby mode and comprises a NAND circuit NAND0 that controls a clock signal CK using a standby mode signal RET. When the standby mode signal RET is at a low level (in standby mode) clock signals C01 and C02 are kept at a high level and low level respectively regardless of the level of the clock signal CK. Further, power continues to be supplied to an FA section in the clock input circuit 13 and to an FB section in a slave latch circuit 12 whereas the power supply to the other circuits is shut off. As a result, the clock signals C01 and C02 remain at the high level and low level respectively and data is held by a loop formed by an on-state transfer gate circuit TG4 and activated inverter circuits INV5 and INV6 in the slave latch circuit 12.

Abstract: An artificial spinal disk comprises a central capsule that is configured to slide laterally within the disk space with one or more of flexion, extension, and lateral bending of the spine so as to shift an instantaneous center of rotation of the artificial disk. In one embodiment, the invention comprises an artificial spinal disk comprising a first plate having an inwardly directed surface, a second plate having an inwardly directed surface facing generally toward the inwardly directed surface of the first plate, and a central capsule with outwardly directed opposed faces that slidably mate with the inwardly directed surfaces of the first and second plates.

Abstract: An artificial spinal disk comprises a central capsule that is configured to slide laterally within the disk space with one or more of flexion, extension, and lateral bending of the spine so as to shift an instantaneous center of rotation of the artificial disk. In one embodiment, the invention comprises an artificial spinal disk comprising a first plate having an inwardly directed surface, a second plate having an inwardly directed surface facing generally toward the inwardly directed surface of the first plate, and a central capsule with outwardly directed opposed faces that slidably mate with the inwardly directed surfaces of the first and second plates.

Abstract: An artificial spinal disk comprises a central capsule that is configured to slide laterally within the disk space with one or more of flexion, extension, and lateral bending of the spine so as to shift an instantaneous center of rotation of the artificial disk. In one embodiment, the invention comprises an artificial spinal disk comprising a first plate having an inwardly directed surface, a second plate having an inwardly directed surface facing generally toward the inwardly directed surface of the first plate, and a central capsule with outwardly directed opposed faces that slidably mate with the inwardly directed surfaces of the first and second plates.

Abstract: A bone fixation apparatus adapted for use in spinal stabilization. The apparatus includes a threaded bone screw having a spherical head that is received in a receiver cup. The receiver cup also includes a slot or groove through which a support rod passes. A saddle is positioned in the receiver cup below the support rod and above the head of the threaded bone screw. Alignment flanges are positioned partially around an opening on the receiver cup opposite the bone screw. A cap having internal grooves corresponding to the alignment flanges mates with the receiver cup. The cap may be positioned onto the receiver cup in a first orientation and secured to the receiver cup by rotating approximately one quarter turn. A compression member is screwed into internal threads on an opening of the cup to provide pressure on the support rod, thereby fixing the rod to the receiver cup.

Abstract: A bone fixation apparatus adapted for use in spinal stabilization. The apparatus includes a threaded bone screw having a spherical head that is received in a receiver cup. The receiver cup also includes a slot or groove through which a support rod passes. A saddle is positioned in the receiver cup below the support rod and above the head of the threaded bone screw. Alignment flanges are positioned partially around an opening on the receiver cup opposite the bone screw. A cap having internal grooves corresponding to the alignment flanges mates with the receiver cup. The cap may be positioned onto the receiver cup in a first orientation and secured to the receiver cup by rotating approximately one quarter turn. A compression member is screwed into internal threads on an opening of the cup to provide pressure on the support rod, thereby fixing the rod to the receiver cup.

Abstract: A verification method of an integrated circuit including an input/output buffer placed in a periphery of a semiconductor device and an internal circuit. The verification method stores physical information on routing of the input/output buffer into a library of the input/output buffer and verifies a placement of the input/output buffer based on the physical information.

Abstract: An artificial spinal disk comprises a central capsule that is configured to slide laterally within the disk space with one or more of flexion, extension, and lateral bending of the spine so as to shift an instantaneous center of rotation of the artificial disk. In one embodiment, the invention comprises an artificial spinal disk comprising a first plate having an inwardly directed surface, a second plate having an inwardly directed surface facing generally toward the inwardly directed surface of the first plate, and a central capsule with outwardly directed opposed faces that slidably mate with the inwardly directed surfaces of the first and second plates.

Abstract: Spinal implants with extending spikes include spikes with laterally extending projections that may form barbs. Several different spike driver mechanisms are also provided. In one embodiment, sliding wedge spike drivers are used. In another embodiment, threaded rotating spike drivers are used. Gear driven spikes may also be provided in some embodiments. Worm gear trains and rack and pinion gear trains may be used to extend the spikes.

Abstract: A semiconductor device having a plurality of wiring layers in a multi-layered structure, includes an inner area at a surface and a pad area surrounding the inner area therein, and further includes a device fabricated below the pad area. The device is comprised of at least one of a bypass capacitor, a protection device, and an input/output device. For instance, the bypass capacitor is comprised of metal wire layers arranged below the pad area.

Abstract: A buffer circuit of an LSI includes first inverter and a second inverter cascaded from the first inverter, each of the first and second inverters including a pMOSFET and an nMOSFET. The body areas or backgates of the pMOSFETs operating in opposite phases and body areas of the nMOSFETs operating in opposite phases are respectively coupled together via a coupling line, to thereby prevent hysteresis or fluctuation of the delay time in the operation of the buffer circuit.

Abstract: A bone fixation apparatus adapted for use in spinal stabilization. The apparatus includes a threaded bone screw having a spherical head that is received in a receiver cup. The receiver cup also includes a slot or groove through which a support rod passes. A saddle is positioned in the receiver cup below the support rod and above the head of the threaded bone screw. Alignment flanges are positioned partially around an opening on the receiver cup opposite the bone screw. A cap having internal grooves corresponding to the alignment flanges mates with the receiver cup. The cap may be positioned onto the receiver cup in a first orientation and secured to the receiver cup by rotating approximately one quarter turn. A compression member is screwed into internal threads on an opening of the cup to provide pressure on the support rod, thereby fixing the rod to the receiver cup.