Abstract: An MIS device which includes a source diffusion layer and a drain diffusion layer under the surface of a semiconductor substrate, and a plurality of gate insulation films on the surface of the semiconductor substrate. Further, a plurality of gate electrodes are formed on the plurality of gate insulation films in series with one another between the source diffusion layer and the drain diffusion layer. Moreover, inter-gate-electrode diffusion layers are formed under the surfaces of regions of the semiconductor substrate among the plurality of the gate electrodes. Insulating side walls are provided on both sides of each of the gate electrodes.