Patents by Inventor Makoto Sakakura

Makoto Sakakura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7876170
    Abstract: A voltage controlled oscillator 1, a variable frequency divider 2, a phase comparator 3, and a loop filter 4 form a Phase Locked Loop (PLL). A sigma-delta modulator 5 sigma-delta modulates data obtained by adding a fractional part M2 of the frequency division factor data with modulation data X by using an output signal of the variable frequency divider 2 as a clock. An output signal of the sigma-delta modulator 5 is added to an integral part M1 of the frequency division factor data, and the resultant data becomes effective frequency division factor data 13 of the variable frequency divider 2. An output signal of the sigma-delta modulator 5 also becomes control data 14 after passing through a D/A converter 6, a low-pass filter 7, and an amplitude adjustment circuit 8. The control data 14 is inputted into a frequency modulation terminal of the voltage controlled oscillator 1.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: January 25, 2011
    Assignee: Panasonic Corporation
    Inventors: Hisashi Adachi, Makoto Sakakura
  • Publication number: 20070200645
    Abstract: A voltage controlled oscillator 1, a variable frequency divider 2, a phase comparator 3, and a loop filter 4 form a Phase Locked Loop (PLL). A sigma-delta modulator 5 sigma-delta modulates data obtained by adding a fractional part M2 of the frequency division factor data with modulation data X by using an output signal of the variable frequency divider 2 as a clock. An output signal of the sigma-delta modulator 5 is added to an integral part M1 of the frequency division factor data, and the resultant data becomes effective frequency division factor data 13 of the variable frequency divider 2. An output signal of the sigma-delta modulator 5 also becomes control data 14 after passing through a D/A converter 6, a low-pass filter 7, and an amplitude adjustment circuit 8. The control data 14 is inputted into a frequency modulation terminal of the voltage controlled oscillator 1.
    Type: Application
    Filed: April 23, 2007
    Publication date: August 30, 2007
    Inventors: Hisashi Adachi, Makoto Sakakura
  • Patent number: 7224238
    Abstract: A voltage controlled oscillator 1, a variable frequency divider 2, a phase comparator 3, and a loop filter 4 form a Phase Locked Loop (PLL). A sigma-delta modulator 5 sigma-delta modulates data obtained by adding a fractional part M2 of the frequency division factor data with modulation data X by using an output signal of the variable frequency divider 2 as a clock. An output signal of the sigma-delta modulator 5 is added to an integral part M1 of the frequency division factor data, and the resultant data becomes effective frequency division factor data 13 of the variable frequency divider 2. An output signal of the sigma-delta modulator 5 also becomes control data 14 after passing through a D/A converter 6, a low-pass filter 7, and an amplitude adjustment circuit 8. The control data 14 is inputted into a frequency modulation terminal of the voltage controlled oscillator 1.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: May 29, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hisashi Adachi, Makoto Sakakura
  • Patent number: 7142614
    Abstract: In a signal generating circuit SG1, a 90 -degree divider 3 generates, from a local oscillation signal SLO supplied through an input terminal 1, an intermediate reference phase signal ISREF and an intermediate quadrature signal ISQR orthogonal in phase to the intermediate reference phase signal ISREF for output to mixers 6 and 7, respectively. A shifter 4 shifts the phase of the local oscillation signal supplied through an input terminal 2 by a predetermined amount to generate a shift signal SSFT for output through a divider 5 to the mixers 6 and 7. The mixer 6 mixes the input intermediate reference phase signal ISREF and the input shift signal SSFT to generate a reference phase signal SREF. The mixer 7 mixes intermediate quadrature signal ISQR and the input shift signal SSFT to generate a quadrature signal SQR. With this, it is possible to provide a signal generator capable of generating highly-accurate, high-frequency reference phase signals and quadrature signals.
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: November 28, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koji Takinami, Hisashi Adachi, Makoto Sakakura
  • Patent number: 7127215
    Abstract: A transmitting/receiving switch, in which a transmission terminal connected to a transmission circuit is connected to an antenna terminal through a first switching element, a filter for attenuating harmonic contents in a transmission signal, a phase-shift circuit for significantly increasing an impedance from a node toward said transmission terminal in a reception frequency band by phase-adjusting the amount of phase shift by performing phase adjustment according to the amount of the phase shift generated by said filter. Furthermore, the antenna terminal connected to an antenna ANT is connected to a reception terminal through the node and a second switching element, and the reception terminal is connected to a reception circuit Rx.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: October 24, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Nakamura, Makoto Sakakura, Toshio Ishizaki, Jyunichi Yoshizumi
  • Patent number: 7081795
    Abstract: An amplitude frequency characteristic adjustment circuit 106 is provided downstream of and connected to a distortion generation circuit 105. An amplitude difference between low-frequency-side and high-frequency-side distortion voltages is adjusted by the amplitude frequency characteristic adjustment circuit 106, and then their amplitudes and phases are adjusted by a vector adjustment circuit 107. This configuration makes it possible to suppress simultaneously both of low-frequency-side and high-frequency-side distortion voltages of a distortion generated by a wide-band class-AB power amplifier even if they are different in amplitude and phase.
    Type: Grant
    Filed: October 24, 2005
    Date of Patent: July 25, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Matsuura, Kaoru Ishida, Makoto Sakakura, Seiji Fujiwara
  • Patent number: 7075383
    Abstract: A voltage controlled oscillator 1, a variable frequency divider 2, a phase comparator 3, and a loop filter 4 form a Phase Locked Loop (PLL). A sigma-delta modulator 5 sigma-delta modulates data obtained by adding a fractional part M2 of the frequency division factor data with modulation data X by using an output signal of the variable frequency divider 2 as a clock. An output signal of the sigma-delta modulator 5 is added to an integral part M1 of the frequency division factor data, and the resultant data becomes effective frequency division factor data 13 of the variable frequency divider 2. An output signal of the sigma-delta modulator 5 also becomes control data 14 after passing through a D/A converter 6, a low-pass filter 7, and an amplitude adjustment circuit 8. The control data 14 is inputted into a frequency modulation terminal of the voltage controlled oscillator 1.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: July 11, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hisashi Adachi, Makoto Sakakura
  • Patent number: 7038557
    Abstract: An antenna duplexer has an antenna terminal; a transmitting phase-shift circuit, one side of which is connected to the antenna terminal; a receiving phase-shift circuit, one side of which is connected to the antenna terminal; a transmitting filter connected to the other side of the transmitting phase-shift circuit and a transmitting terminal; and a receiving filter connected to the other side of the receiving phase-shift circuit and a receiving terminal; wherein the transmitting filter and/or the receiving filter is a composite filter, and the composite filter attains a characteristic having an attenuation pole at simultaneous transmission and reception time when transmission and reception are simultaneously performed, and controls respective impedances by the transmitting phase-shift circuit and the receiving phase-shift circuit to operate as a sharing unit and attains a characteristic where the attenuation pole is removed at non simultaneous transmission and reception time when transmission and reception
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: May 2, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Nakamura, Toshio Ishizaki, Hisashi Adachi, Makoto Sakakura, Hiroaki Kosugi, Hiroyuki Itokawa, Toshiaki Nakamura
  • Publication number: 20060061418
    Abstract: An amplitude frequency characteristic adjustment circuit 106 is provided downstream of and connected to a distortion generation circuit 105. An amplitude difference between low-frequency-side and high-frequency-side distortion voltages is adjusted by the amplitude frequency characteristic adjustment circuit 106, and then their amplitudes and phases are adjusted by a vector adjustment circuit 107. This configuration makes it possible to suppress simultaneously both of low-frequency-side and high-frequency-side distortion voltages of a distortion generated by a wide-band class-AB power amplifier even if they are different in amplitude and phase.
    Type: Application
    Filed: October 24, 2005
    Publication date: March 23, 2006
    Inventors: Toru Matsuura, Kaoru Ishida, Makoto Sakakura, Seiji Fujiwara
  • Patent number: 6989713
    Abstract: An amplitude frequency characteristic adjustment circuit 106 is provided downstream of and connected to a distortion generation circuit 105. An amplitude difference between low-frequency-side and high-frequency-side distortion voltages is adjusted by the amplitude frequency characteristic adjustment circuit 106, and then their amplitudes and phases are adjusted by a vector adjustment circuit 107. This configuration makes it possible to suppress simultaneously both of low-frequency-side and high-frequency-side distortion voltages of a distortion generated by a wide-band class-AB power amplifier even if they are different in amplitude and phase.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: January 24, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Matsuura, Kaoru Ishida, Makoto Sakakura, Seiji Fujiwara
  • Patent number: 6977548
    Abstract: An amplitude frequency characteristic adjustment circuit 106 is provided downstream of and connected to a distortion generation circuit 105. An amplitude difference between low-frequency-side and high-frequency-side distortion voltages is adjusted by the amplitude frequency characteristic adjustment circuit 106, and then their amplitudes and phases are adjusted by a vector adjustment circuit 107. This configuration makes it possible to suppress simultaneously both of low-frequency-side and high-frequency-side distortion voltages of a distortion generated by a wide-band class-AB power amplifier even if they are different in amplitude and phase.
    Type: Grant
    Filed: September 22, 2004
    Date of Patent: December 20, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Matsuura, Kaoru Ishida, Makoto Sakakura, Seiji Fujiwara
  • Patent number: 6960957
    Abstract: An amplitude frequency characteristic adjustment circuit 106 is provided downstream of and connected to a distortion generation circuit 105. An amplitude difference between low-frequency-side and high-frequency-side distortion voltages is adjusted by the amplitude frequency characteristic adjustment circuit 106, and then their amplitudes and phases are adjusted by a vector adjustment circuit 107. This configuration makes it possible to suppress simultaneously both of low-frequency-side and high-frequency-side distortion voltages of a distortion generated by a wide-band class-AB power amplifier even if they are different in amplitude and phase.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: November 1, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Matsuura, Kaoru Ishida, Makoto Sakakura, Seiji Fujiwara
  • Patent number: 6960958
    Abstract: An amplitude frequency characteristic adjustment circuit 106 is provided downstream of and connected to a distortion generation circuit 105. An amplitude difference between low-frequency-side and high-frequency-side distortion voltages is adjusted by the amplitude frequency characteristic adjustment circuit 106, and then their amplitudes and phases are adjusted by a vector adjustment circuit 107. This configuration makes it possible to suppress simultaneously both of low-frequency-side and high-frequency-side distortion voltages of a distortion generated by a wide-band class-AB power amplifier even if they are different in amplitude and phase.
    Type: Grant
    Filed: January 5, 2004
    Date of Patent: November 1, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toru Matsuura, Kaoru Ishida, Makoto Sakakura, Seiji Fujiwara
  • Publication number: 20050237113
    Abstract: An amplitude frequency characteristic adjustment circuit 106 is provided downstream of and connected to a distortion generation circuit 105. An amplitude difference between low-frequency-side and high-frequency-side distortion voltages is adjusted by the amplitude frequency characteristic adjustment circuit 106, and then their amplitudes and phases are adjusted by a vector adjustment circuit 107. This configuration makes it possible to suppress simultaneously both of low-frequency-side and high-frequency-side distortion voltages of a distortion generated by a wide-band class-AB power amplifier even if they are different in amplitude and phase.
    Type: Application
    Filed: April 7, 2005
    Publication date: October 27, 2005
    Inventors: Toru Matsuura, Kaoru Ishida, Makoto Sakakura, Seiji Fujiwara
  • Publication number: 20050213697
    Abstract: A voltage controlled oscillator 1, a variable frequency divider 2, a phase comparator 3, and a loop filter 4 form a Phase Locked Loop (PLL). A sigma-delta modulator 5 sigma-delta modulates data obtained by adding a fractional part M2 of the frequency division factor data with modulation data X by using an output signal of the variable frequency divider 2 as a clock. An output signal of the sigma-delta modulator 5 is added to an integral part M1 of the frequency division factor data, and the resultant data becomes effective frequency division factor data 13 of the variable frequency divider 2. An output signal of the sigma-delta modulator 5 also becomes control data 14 after passing through a D/A converter 6, a low-pass filter 7, and an amplitude adjustment circuit 8. The control data 14 is inputted into a frequency modulation terminal of the voltage controlled oscillator 1.
    Type: Application
    Filed: May 5, 2005
    Publication date: September 29, 2005
    Inventors: Hisashi Adachi, Makoto Sakakura
  • Patent number: 6933780
    Abstract: A predistortion circuit has an input terminal for inputting a predetermined signal; a nonlinear device directly or indirectly connected to the input terminal; a bias supply circuit for applying a voltage to the nonlinear device; specific-frequency suppressing means connected to one side or both sides of the nonlinear device directly without another intervening device and of suppressing all or part of such frequencies that are from a frequency corresponding to DC to a frequency corresponding to an occupied band width of an input signal inputted to the input terminal and/or suppressing at least one higher harmonic frequency of a carrier wave of the input signal; and an output terminal for outputting a signal.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: August 23, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiji Fujiwara, Toru Matsuura, Kaoru Ishida, Makoto Sakakura
  • Patent number: 6891462
    Abstract: A high-Q inductor for high frequency, having a plurality of inductor elements formed in a plurality of IC wiring layers with a connection formed therebetween. The directions of the magnetic fields generated by the respective inductor elements are substantially the same. With this construction, the section of the inductor is increased reducing the serial resistance component and an influence of a skin effect in a high-frequency range is eliminated increasing the Q value.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: May 10, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiakira Andoh, Makoto Sakakura, Toshifumi Nakatani, Kouji Takinami, Yukio Hiraoka
  • Publication number: 20050035818
    Abstract: An amplitude frequency characteristic adjustment circuit 106 is provided downstream of and connected to a distortion generation circuit 105. An amplitude difference between low-frequency-side and high-frequency-side distortion voltages is adjusted by the amplitude frequency characteristic adjustment circuit 106, and then their amplitudes and phases are adjusted by a vector adjustment circuit 107. This configuration makes it possible to suppress simultaneously both of low-frequency-side and high-frequency-side distortion voltages of a distortion generated by a wide-band class-AB power amplifier even if they are different in amplitude and phase.
    Type: Application
    Filed: September 22, 2004
    Publication date: February 17, 2005
    Inventors: Toru Matsuura, Kaoru Ishida, Makoto Sakakura, Seiji Fujiwara
  • Publication number: 20040135631
    Abstract: An amplitude frequency characteristic adjustment circuit 106 is provided downstream of and connected to a distortion generation circuit 105. An amplitude difference between low-frequency-side and high-frequency-side distortion voltages is adjusted by the amplitude frequency characteristic adjustment circuit 106, and then their amplitudes and phases are adjusted by a vector adjustment circuit 107. This configuration makes it possible to suppress simultaneously both of low-frequency-side and high-frequency-side distortion voltages of a distortion generated by a wide-band class-AB power amplifier even if they are different in amplitude and phase.
    Type: Application
    Filed: January 5, 2004
    Publication date: July 15, 2004
    Inventors: Toru Matsuura, Kaoru Ishida, Makoto Sakakura, Seiji Fujiwara
  • Publication number: 20040041680
    Abstract: A high-Q inductor for high frequency, having a plurality of inductor elements formed in a plurality of IC wiring layers with a connection formed therebetween. The directions of the magnetic fields generated by the respective inductor elements are substantially the same. With this construction, the section of the inductor is increased reducing the serial resistance component and an influence of a skin effect in a high-frequency range is eliminated increasing the Q value.
    Type: Application
    Filed: September 23, 2003
    Publication date: March 4, 2004
    Inventors: Toshiakira Andoh, Makoto Sakakura, Toshifumi Nakatani, Kouji Takinami, Yukio Hiraoka