Patents by Inventor Makoto TAKESAWA

Makoto TAKESAWA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device having semiconductor chip with large and small irregularities on upper and lower side surface portions thereof
    Patent number: 10236269
    Abstract: A semiconductor device has a semiconductor chip adhesively bonded to a die pad. An area having large irregularities is formed on an upper side surface of the semiconductor chip to be covered by an encapsulating resin, and an area having small irregularities is formed on a lower side surface of the semiconductor chip, thereby improving adhesive strength between the semiconductor chip and the encapsulating resin and preventing penetration of moisture from outside.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: March 19, 2019
    Assignee: ABLIC INC.
    Inventor: Makoto Takesawa
  • SEMICONDUCTOR DEVICE HAVING SEMICONDUCTOR CHIP WITH LARGE AND SMALL IRREGULARITIES ON UPPER AND LOWER SIDE SURFACE PORTIONS THEREOF
    Publication number: 20180158792
    Abstract: A semiconductor device has a semiconductor chip adhesively bonded to a die pad. An area having large irregularities is formed on an upper side surface of the semiconductor chip to be covered by an encapsulating resin, and an area having small irregularities is formed on a lower side surface of the semiconductor chip, thereby improving adhesive strength between the semiconductor chip and the encapsulating resin and preventing penetration of moisture from outside.
    Type: Application
    Filed: January 31, 2018
    Publication date: June 7, 2018
    Inventor: Makoto TAKESAWA
  • Semiconductor device having semiconductor chip with large and small irregularities on upper and lower side surface portions thereof
    Patent number: 9887171
    Abstract: A semiconductor device has a semiconductor chip adhesively bonded to a die pad. An area having large irregularities is formed on an upper side surface of the semiconductor chip to be covered by an encapsulating resin, and an area having small irregularities is formed on a lower side surface of the semiconductor chip, thereby improving adhesive strength between the semiconductor chip and the encapsulating resin and preventing penetration of moisture from outside.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: February 6, 2018
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventor: Makoto Takesawa
  • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20150228504
    Abstract: Provided is a semiconductor device having satisfactory moisture resistance. By forming an area (25) having large irregularities on an upper side surface of a semiconductor chip (2) to be covered by an encapsulating resin (8), and an area (24) having small irregularities on a lower side surface of the semiconductor chip (2), adhesive strength between the semiconductor chip (2) and the encapsulating resin (8) is improved, and penetration of moisture from outside is prevented.
    Type: Application
    Filed: February 9, 2015
    Publication date: August 13, 2015
    Inventor: Makoto TAKESAWA