Patents by Inventor Makoto Tochigi

Makoto Tochigi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6748207
    Abstract: A power distributing and synthesizing device which comprises first to third signal terminals, first and second transmission lines and a resistor. The first signal terminal is provided at the connection portion between one end of the first transmission line and one end of the second transmission line; the second signal terminal is provided at the other end of the first transmission line; and the third signal terminal is provided at the other end of the second transmission line. The resistor is connected between the second signal terminal and the third signal terminal. LC serial resonators each comprising an inductor and a capacitor are respectively connected between the first to third signal terminals and a ground.
    Type: Grant
    Filed: September 27, 2000
    Date of Patent: June 8, 2004
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Makoto Tochigi, Tomoya Bando, Ken Tonegawa
  • Patent number: 5990760
    Abstract: A stripline-type delay line has a plurality of rectangular sheet layers which are made from a dielectric material with a relative dielectric constant .di-elect cons.r of about 6.3, having magnesium oxide and silica as main components. One sheet layer is placed at the top, and the other layers are laminated thereunder in the following order: a sheet layer on which a first ground conductor is formed on its upper surface, a sheet layer on which a transmission line folded in a meander shape is formed on its upper surface, and a sheet layer on which a second ground conductor is formed on its upper surface. On side faces of the laminated dielectric and on adjacent portions of the upper and lower surfaces, an input terminal, an output terminal, and ground terminals are formed by printing, and then the dielectric is baked.
    Type: Grant
    Filed: July 7, 1997
    Date of Patent: November 23, 1999
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Norio Yoshida, Makoto Tochigi
  • Patent number: 5923230
    Abstract: A delay line is produced by firing a laminated body and terminals (an input terminal, an output terminal and grounding terminals) which are formed by printing or another method on the side faces, top and bottom surfaces of the laminated body. The laminated body has four dielectric rectangular sheet layers (dielectric constant .epsilon.r=approximately 6.3) containing mainly barium oxide, aluminum oxide and silica. The laminated body is formed by layering from top to bottom, in the order given, a first sheet layer, a second sheet layer which has a grounding conductor formed on its top surface, a third sheet layer which has a transmission line meanderingly formed on its top surface, and a fourth sheet layer which has another grounding conductor formed on its top surface.
    Type: Grant
    Filed: March 26, 1997
    Date of Patent: July 13, 1999
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Norio Yoshida, Makoto Tochigi