Patents by Inventor Makoto Ueki
Makoto Ueki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120228728Abstract: A semiconductor device in which MRAM is formed in a wiring layer A contained in a multilayered wiring layer, the MRAM having at least two first magnetization pinning layers in contact with a first wiring formed in a wiring layer and insulated from each other, a free magnetization layer overlapping the two first magnetization pinning layers in a plan view, and connected with the first magnetization pinning layers, a non-magnetic layer situated over the free magnetization layer, and a second magnetization pinning layer situated over the non-magnetic layer.Type: ApplicationFiled: February 17, 2012Publication date: September 13, 2012Inventors: Makoto UEKI, Naoya Inoue, Yoshihiro Hayashi
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Patent number: 8198730Abstract: A semiconductor device has a multilayer interconnection including a copper interconnection film formed in a predetermined area within an insulating film, a liner film, and a high-melting-point metal film. The copper interconnection film is polycrystalline, and crystal grains occupying 40% or more of an area of a unit interconnection surface among crystal grains forming the polycrystal are oriented to (111) in a substrate thickness direction. The copper interconnection film has crystal conformity with the noble metal liner film. In a case where the high-melting-point metal film is formed of Ti and the noble metal liner film is a Ru film, the high-melting-point metal of Ti dissolves into Ru in a solid state to form the noble metal liner. Thus, a copper interconnection is formed with both of Cu diffusion barrier characteristics and Cu crystal conformity.Type: GrantFiled: January 8, 2008Date of Patent: June 12, 2012Assignee: NEC CorporationInventors: Masayoshi Tagami, Yoshihiro Hayashi, Munehiro Tada, Takahiro Onodera, Naoya Furutake, Makoto Ueki, Mari Amano
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Publication number: 20120070986Abstract: Provided is a semiconductor device, which includes an interlayer insulating film formed on a semiconductor substrate, a wiring layer filled in a recess formed in the interlayer insulating film, and a cap insulating film. The interlayer insulating film includes a first SiOCH film and a surface modification layer including an SiOCH film formed by modifying a surface layer of the first SiOCH film, the SiOCH film having a lower carbon concentration and a higher oxygen concentration than the first SiOCH film has. The cap insulating film contacts with surfaces of the metal wiring and the surface modification layer.Type: ApplicationFiled: November 22, 2011Publication date: March 22, 2012Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Makoto UEKI, Takahiro ONODERA, Yoshihiro HAYASHI
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Publication number: 20120061844Abstract: A wiring metal contains a polycrystal of copper (Cu) as a primary element and an additional element other than Cu, and concentration of the additional element is, at crystal grain boundaries composing the Cu polycrystal and in vicinities of the crystal grain boundaries, higher than that of the inside of the crystal grains. The additional element is preferably at least one element selected from a group consisting of Ti, Zr, Hf, Cr, Co, Al, Sn, Ni, Mg, and Ag. This Cu wiring is formed by forming a Cu polycrystalline film, forming an additional element layer on this Cu film, and diffusing this additional element from the additional element layer into the Cu film. This copper alloy for wiring is preferred as metal wiring formed for a semiconductor device.Type: ApplicationFiled: November 22, 2011Publication date: March 15, 2012Applicant: NEC CORPORATIONInventors: Makoto UEKI, Masayuki HIROI, Nobuyuki IKARASHI, Yoshihiro HAYASHI
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Publication number: 20120015517Abstract: The semiconductor device includes an insulating film that is formed using a cyclic siloxane having a six-membered ring structure as a raw material; a trench that is formed in the insulating film; and a interconnect that is configured by a metal film embedded in the trench. In the semiconductor device, a modified layer is formed on a bottom surface of the trench, in which the number of carbon atoms and/or the number of nitrogen atoms per unit volume is larger than that inside the insulating film.Type: ApplicationFiled: July 14, 2011Publication date: January 19, 2012Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Daisuke OSHIDA, Ippei KUME, Makoto UEKI, Manabu IGUCHI, Naoya INOUE, Takuya MARUYAMA, Toshiji TAIJI, Hirokazu KATSUYAMA
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Publication number: 20110316161Abstract: In an insulating film structure having a barrier insulating film, a via interlayer insulating film, a wiring interlayer insulating film, and a hard mask film stacked in this order on an underlayer wiring, a via hole pattern is formed in the insulating film structure, then a groove pattern is formed in the hard mask film, and a grove is formed in the insulating film structure using this as a mask. According to the prior art, the via side wall is oxidized equally severely in the both processes. The trench side wall is oxidized severely in the via first process according to the prior art, whereas, according to the present invention, the oxidation thereof is suppressed to such an extent that an almost non-oxidized state can be created.Type: ApplicationFiled: September 7, 2011Publication date: December 29, 2011Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Hiroto OHTAKE, Munehiro TADA, Makoto UEKI, Yoshihiro HAYASHI
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Patent number: 8080878Abstract: Provided is a semiconductor device, which includes an interlayer insulating film formed on a semiconductor substrate, a wiring layer filled in a recess formed in the interlayer insulating film, and a cap insulating film. The interlayer insulating film includes a first SiOCH film and a surface modification layer including an SiOCH film formed by modifying a surface layer of the first SiOCH film, the SiOCH film having a lower carbon concentration and a higher oxygen concentration than the first SiOCH film has. The cap insulating film contacts with surfaces of the metal wiring and the surface modification layer.Type: GrantFiled: September 11, 2009Date of Patent: December 20, 2011Assignee: Renesas Electronics CorporationInventors: Makoto Ueki, Takahiro Onodera, Yoshihiro Hayashi
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Publication number: 20100096756Abstract: A semiconductor device has a multilayer interconnection including a copper interconnection film formed in a predetermined area within an insulating film, a liner film, and a high-melting-point metal film. The copper interconnection film is polycrystalline, and crystal grains occupying 40% or more of an area of a unit interconnection surface among crystal grains forming the polycrystal are oriented to (111) in a substrate thickness direction. The copper interconnection film has crystal conformity with the noble metal liner film. In a case where the high-melting-point metal film is formed of Ti and the noble metal liner film is a Ru film, the high-melting-point metal of Ti dissolves into Ru in a solid state to form the noble metal liner. Thus, a copper interconnection is formed with both of Cu diffusion barrier characteristics and Cu crystal conformity.Type: ApplicationFiled: January 8, 2008Publication date: April 22, 2010Inventors: Masayoshi Tagami, Yoshihiro Hayashi, Munehiro Tada, Takahiro Onodera, Naoya Furutake, Makoto Ueki, Mari Amano
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Publication number: 20100059887Abstract: Provided is a semiconductor device, which includes an interlayer insulating film formed on a semiconductor substrate, a wiring layer filled in a recess formed in the interlayer insulating film, and a cap insulating film. The interlayer insulating film includes a first SiOCH film and a surface modification layer including an SiOCH film formed by modifying a surface layer of the first SiOCH film, the SiOCH film having a lower carbon concentration and a higher oxygen concentration than the first SiOCH film has. The cap insulating film contacts with surfaces of the metal wiring and the surface modification layer.Type: ApplicationFiled: September 11, 2009Publication date: March 11, 2010Applicant: NEC ELECTRONICS CORPORATIONInventors: MAKOTO UEKI, TAKAHIRO ONODERA, YOSHIHIRO HAYASHI
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Publication number: 20100025852Abstract: To suppress deterioration in reliability of wiring and to reduce effective dielectric constant of wiring. In a semiconductor device, copper-containing wirings are covered by barrier insulating films, and the barrier insulating films contain a component of an organic silica containing unsaturated hydrocarbon and amorphous carbon. The copper-containing wirings are covered by the barrier insulating films that contain a component that is in an organic silica structure containing unsaturated hydrocarbon and amorphous carbon. Accordingly, inter-wiring capacitance is reduced without deteriorating reliability of the copper-containing wiring, thereby realizing a high-speed LSI with low power consumption.Type: ApplicationFiled: December 20, 2007Publication date: February 4, 2010Inventors: Makoto Ueki, Hironori Yamamoto, Yoshihiro Hayashi, Fuminori Ito, Yoshiyuki Fukumoto
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Publication number: 20090278178Abstract: Disclosed is a semiconductor device which includes a MIS FET on a surface of a substrate, an insulating film on the substrate to cover the MIS FET, an opening that gets to an impurity diffusing region formed in the insulating film, another opening that gets to a gate electrode or to an extension part of the gate electrode formed in the insulating film, and an electrically conductive member including mainly copper filled in each of the openings. The insulating film includes a layer including, as main components, silicon, oxygen, carbon and hydrogen (FIG. 1).Type: ApplicationFiled: October 16, 2008Publication date: November 12, 2009Applicant: NEC CORPORATIONInventors: Jun Kawahara, Hironori Yamamoto, Makoto Ueki, Yoshihiro Hayashi
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Publication number: 20090203208Abstract: A wiring metal contains a polycrystal of copper (Cu) as a primary element and an additional element other than Cu, and concentration of the additional element is, at crystal grain boundaries composing the Cu polycrystal and in vicinities of the crystal grain boundaries, higher than that of the inside of the crystal grains. The additional element is preferably at least one element selected from a group consisting of Ti, Zr, Hf, Cr, Co, Al, Sn, Ni, Mg, and Ag. This Cu wiring is formed by forming a Cu polycrystalline film, forming an additional element layer on this Cu film, and diffusing this additional element from the additional element layer into the Cu film. This copper alloy for wiring is preferred as metal wiring formed for a semiconductor device.Type: ApplicationFiled: April 20, 2009Publication date: August 13, 2009Applicant: NEC CorporationInventors: Makoto UEKI, Masayuki HIROI, Nobuyuki IKARASHI, Yoshihiro HAYASHI
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Patent number: 7545040Abstract: A wiring metal contains a polycrystal of copper (Cu) as a primary element and an additional element other than Cu, and concentration of the additional element is, at crystal grain boundaries composing the Cu polycrystal and in vicinities of the crystal grain boundaries, higher than that of the inside of the crystal grains. The additional element is preferably at least one element selected from a group consisting of Ti, Zr, Hf, Cr, Co, Al, Sn, Ni, Mg, and Ag. This Cu wiring is formed by forming a Cu polycrystalline film, forming an additional element layer on this Cu film, and diffusing this additional element from the additional element layer into the Cu film. This copper alloy for wiring is preferred as metal wiring formed for a semiconductor device.Type: GrantFiled: September 22, 2003Date of Patent: June 9, 2009Assignee: NEC CorporationInventors: Makoto Ueki, Masayuki Hiroi, Nobuyuki Ikarashi, Yoshihiro Hayashi
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Publication number: 20090014887Abstract: In an insulating film structure having a barrier insulating film, a via interlayer insulating film, a wiring interlayer insulating film, and a hard mask film stacked in this order on an underlayer wiring, a via hole pattern is formed in the insulating film structure, then a groove pattern is formed in the hard mask film, and a grove is formed in the insulating film structure using this as a mask. According to the prior art, the via side wall is oxidized equally severely in the both processes. The trench side wall is oxidized severely in the via first process according to the prior art, whereas, according to the present invention, the oxidation thereof is suppressed to such an extent that an almost non-oxidized state can be created.Type: ApplicationFiled: January 5, 2007Publication date: January 15, 2009Applicant: NEC CORPORATIONInventors: Hiroto Ohtake, Munehiro Tada, Makoto Ueki, Yoshihiro Hayashi
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Publication number: 20060113685Abstract: A wiring metal contains a polycrystal of copper (Cu) as a primary element and an additional element other than Cu, and concentration of the additional element is, at crystal grain boundaries composing the Cu polycrystal and in vicinities of the crystal grain boundaries, higher than that of the inside of the crystal grains. The additional element is preferably at least one element selected from a group consisting of Ti, Zr, Hf, Cr, Co, Al, Sn, Ni, Mg, and Ag. This Cu wiring is formed by forming a Cu polycrystalline film, forming an additional element layer on this Cu film, and diffusing this additional element from the additional element layer into the Cu film. This copper alloy for wiring is preferred as metal wiring formed for a semiconductor device.Type: ApplicationFiled: September 22, 2003Publication date: June 1, 2006Applicant: NEC CorporationInventors: Makoto Ueki, Masayuki Hiroi, Nobuyuki Ikarashi, Yoshihiro Hayashi
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Patent number: 6916203Abstract: A water-proof modular connector includes a plug socket to be fixed to an object, and a plug detachably coupled to the plug socket. The plug socket includes a plug socket body having first and second socket-openings directing outwardly and inwardly of the object, respectively, a modular jack unit having first and second jack-openings directed in opposite directions to each other, and a holder which holds the modular jack in the plug socket body such that the first and second jack-openings are directed to the first and second socket-openings, respectively. The plug includes a plug body through which a communication cable passes, a modular plug connected to the communication cable, a first positioning unit which positions the modular plug in the plug body, a cap which detachably couples the plug body to the plug socket body such that the modular plug is inserted into the first socket-opening, and a water-proof unit ensuring water-proof between the plug socket body and the plug body.Type: GrantFiled: May 28, 2004Date of Patent: July 12, 2005Assignee: NEC CorporationInventors: Takashi Oyamada, Makoto Ueki
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Publication number: 20040242067Abstract: A water-proof modular connector includes a plug socket to be fixed to an object, and a plug detachably coupled to the plug socket. The plug socket includes a plug socket body having first and second socket-openings directing outwardly and inwardly of the object, respectively, a modular jack unit having first and second jack-openings directed in opposite directions to each other, and a holder which holds the modular jack in the plug socket body such that the first and second jack-openings are directed to the first and second socket-openings, respectively. The plug includes a plug body through which a communication cable passes, a modular plug connected to the communication cable, a first positioning unit which positions the modular plug in the plug body, a cap which detachably couples the plug body to the plug socket body such that the modular plug is inserted into the first socket-opening, and a water-proof unit ensuring water-proof between the plug socket body and the plug body.Type: ApplicationFiled: May 28, 2004Publication date: December 2, 2004Applicant: NEC CorporationInventors: Takashi Oyamada, Makoto Ueki