Patents by Inventor Makoto Ueki

Makoto Ueki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120228728
    Abstract: A semiconductor device in which MRAM is formed in a wiring layer A contained in a multilayered wiring layer, the MRAM having at least two first magnetization pinning layers in contact with a first wiring formed in a wiring layer and insulated from each other, a free magnetization layer overlapping the two first magnetization pinning layers in a plan view, and connected with the first magnetization pinning layers, a non-magnetic layer situated over the free magnetization layer, and a second magnetization pinning layer situated over the non-magnetic layer.
    Type: Application
    Filed: February 17, 2012
    Publication date: September 13, 2012
    Inventors: Makoto UEKI, Naoya Inoue, Yoshihiro Hayashi
  • Patent number: 8198730
    Abstract: A semiconductor device has a multilayer interconnection including a copper interconnection film formed in a predetermined area within an insulating film, a liner film, and a high-melting-point metal film. The copper interconnection film is polycrystalline, and crystal grains occupying 40% or more of an area of a unit interconnection surface among crystal grains forming the polycrystal are oriented to (111) in a substrate thickness direction. The copper interconnection film has crystal conformity with the noble metal liner film. In a case where the high-melting-point metal film is formed of Ti and the noble metal liner film is a Ru film, the high-melting-point metal of Ti dissolves into Ru in a solid state to form the noble metal liner. Thus, a copper interconnection is formed with both of Cu diffusion barrier characteristics and Cu crystal conformity.
    Type: Grant
    Filed: January 8, 2008
    Date of Patent: June 12, 2012
    Assignee: NEC Corporation
    Inventors: Masayoshi Tagami, Yoshihiro Hayashi, Munehiro Tada, Takahiro Onodera, Naoya Furutake, Makoto Ueki, Mari Amano
  • Publication number: 20120070986
    Abstract: Provided is a semiconductor device, which includes an interlayer insulating film formed on a semiconductor substrate, a wiring layer filled in a recess formed in the interlayer insulating film, and a cap insulating film. The interlayer insulating film includes a first SiOCH film and a surface modification layer including an SiOCH film formed by modifying a surface layer of the first SiOCH film, the SiOCH film having a lower carbon concentration and a higher oxygen concentration than the first SiOCH film has. The cap insulating film contacts with surfaces of the metal wiring and the surface modification layer.
    Type: Application
    Filed: November 22, 2011
    Publication date: March 22, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Makoto UEKI, Takahiro ONODERA, Yoshihiro HAYASHI
  • Publication number: 20120061844
    Abstract: A wiring metal contains a polycrystal of copper (Cu) as a primary element and an additional element other than Cu, and concentration of the additional element is, at crystal grain boundaries composing the Cu polycrystal and in vicinities of the crystal grain boundaries, higher than that of the inside of the crystal grains. The additional element is preferably at least one element selected from a group consisting of Ti, Zr, Hf, Cr, Co, Al, Sn, Ni, Mg, and Ag. This Cu wiring is formed by forming a Cu polycrystalline film, forming an additional element layer on this Cu film, and diffusing this additional element from the additional element layer into the Cu film. This copper alloy for wiring is preferred as metal wiring formed for a semiconductor device.
    Type: Application
    Filed: November 22, 2011
    Publication date: March 15, 2012
    Applicant: NEC CORPORATION
    Inventors: Makoto UEKI, Masayuki HIROI, Nobuyuki IKARASHI, Yoshihiro HAYASHI
  • Publication number: 20120015517
    Abstract: The semiconductor device includes an insulating film that is formed using a cyclic siloxane having a six-membered ring structure as a raw material; a trench that is formed in the insulating film; and a interconnect that is configured by a metal film embedded in the trench. In the semiconductor device, a modified layer is formed on a bottom surface of the trench, in which the number of carbon atoms and/or the number of nitrogen atoms per unit volume is larger than that inside the insulating film.
    Type: Application
    Filed: July 14, 2011
    Publication date: January 19, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Daisuke OSHIDA, Ippei KUME, Makoto UEKI, Manabu IGUCHI, Naoya INOUE, Takuya MARUYAMA, Toshiji TAIJI, Hirokazu KATSUYAMA
  • Publication number: 20110316161
    Abstract: In an insulating film structure having a barrier insulating film, a via interlayer insulating film, a wiring interlayer insulating film, and a hard mask film stacked in this order on an underlayer wiring, a via hole pattern is formed in the insulating film structure, then a groove pattern is formed in the hard mask film, and a grove is formed in the insulating film structure using this as a mask. According to the prior art, the via side wall is oxidized equally severely in the both processes. The trench side wall is oxidized severely in the via first process according to the prior art, whereas, according to the present invention, the oxidation thereof is suppressed to such an extent that an almost non-oxidized state can be created.
    Type: Application
    Filed: September 7, 2011
    Publication date: December 29, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Hiroto OHTAKE, Munehiro TADA, Makoto UEKI, Yoshihiro HAYASHI
  • Patent number: 8080878
    Abstract: Provided is a semiconductor device, which includes an interlayer insulating film formed on a semiconductor substrate, a wiring layer filled in a recess formed in the interlayer insulating film, and a cap insulating film. The interlayer insulating film includes a first SiOCH film and a surface modification layer including an SiOCH film formed by modifying a surface layer of the first SiOCH film, the SiOCH film having a lower carbon concentration and a higher oxygen concentration than the first SiOCH film has. The cap insulating film contacts with surfaces of the metal wiring and the surface modification layer.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: December 20, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Makoto Ueki, Takahiro Onodera, Yoshihiro Hayashi
  • Publication number: 20100096756
    Abstract: A semiconductor device has a multilayer interconnection including a copper interconnection film formed in a predetermined area within an insulating film, a liner film, and a high-melting-point metal film. The copper interconnection film is polycrystalline, and crystal grains occupying 40% or more of an area of a unit interconnection surface among crystal grains forming the polycrystal are oriented to (111) in a substrate thickness direction. The copper interconnection film has crystal conformity with the noble metal liner film. In a case where the high-melting-point metal film is formed of Ti and the noble metal liner film is a Ru film, the high-melting-point metal of Ti dissolves into Ru in a solid state to form the noble metal liner. Thus, a copper interconnection is formed with both of Cu diffusion barrier characteristics and Cu crystal conformity.
    Type: Application
    Filed: January 8, 2008
    Publication date: April 22, 2010
    Inventors: Masayoshi Tagami, Yoshihiro Hayashi, Munehiro Tada, Takahiro Onodera, Naoya Furutake, Makoto Ueki, Mari Amano
  • Publication number: 20100059887
    Abstract: Provided is a semiconductor device, which includes an interlayer insulating film formed on a semiconductor substrate, a wiring layer filled in a recess formed in the interlayer insulating film, and a cap insulating film. The interlayer insulating film includes a first SiOCH film and a surface modification layer including an SiOCH film formed by modifying a surface layer of the first SiOCH film, the SiOCH film having a lower carbon concentration and a higher oxygen concentration than the first SiOCH film has. The cap insulating film contacts with surfaces of the metal wiring and the surface modification layer.
    Type: Application
    Filed: September 11, 2009
    Publication date: March 11, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: MAKOTO UEKI, TAKAHIRO ONODERA, YOSHIHIRO HAYASHI
  • Publication number: 20100025852
    Abstract: To suppress deterioration in reliability of wiring and to reduce effective dielectric constant of wiring. In a semiconductor device, copper-containing wirings are covered by barrier insulating films, and the barrier insulating films contain a component of an organic silica containing unsaturated hydrocarbon and amorphous carbon. The copper-containing wirings are covered by the barrier insulating films that contain a component that is in an organic silica structure containing unsaturated hydrocarbon and amorphous carbon. Accordingly, inter-wiring capacitance is reduced without deteriorating reliability of the copper-containing wiring, thereby realizing a high-speed LSI with low power consumption.
    Type: Application
    Filed: December 20, 2007
    Publication date: February 4, 2010
    Inventors: Makoto Ueki, Hironori Yamamoto, Yoshihiro Hayashi, Fuminori Ito, Yoshiyuki Fukumoto
  • Publication number: 20090278178
    Abstract: Disclosed is a semiconductor device which includes a MIS FET on a surface of a substrate, an insulating film on the substrate to cover the MIS FET, an opening that gets to an impurity diffusing region formed in the insulating film, another opening that gets to a gate electrode or to an extension part of the gate electrode formed in the insulating film, and an electrically conductive member including mainly copper filled in each of the openings. The insulating film includes a layer including, as main components, silicon, oxygen, carbon and hydrogen (FIG. 1).
    Type: Application
    Filed: October 16, 2008
    Publication date: November 12, 2009
    Applicant: NEC CORPORATION
    Inventors: Jun Kawahara, Hironori Yamamoto, Makoto Ueki, Yoshihiro Hayashi
  • Publication number: 20090203208
    Abstract: A wiring metal contains a polycrystal of copper (Cu) as a primary element and an additional element other than Cu, and concentration of the additional element is, at crystal grain boundaries composing the Cu polycrystal and in vicinities of the crystal grain boundaries, higher than that of the inside of the crystal grains. The additional element is preferably at least one element selected from a group consisting of Ti, Zr, Hf, Cr, Co, Al, Sn, Ni, Mg, and Ag. This Cu wiring is formed by forming a Cu polycrystalline film, forming an additional element layer on this Cu film, and diffusing this additional element from the additional element layer into the Cu film. This copper alloy for wiring is preferred as metal wiring formed for a semiconductor device.
    Type: Application
    Filed: April 20, 2009
    Publication date: August 13, 2009
    Applicant: NEC Corporation
    Inventors: Makoto UEKI, Masayuki HIROI, Nobuyuki IKARASHI, Yoshihiro HAYASHI
  • Patent number: 7545040
    Abstract: A wiring metal contains a polycrystal of copper (Cu) as a primary element and an additional element other than Cu, and concentration of the additional element is, at crystal grain boundaries composing the Cu polycrystal and in vicinities of the crystal grain boundaries, higher than that of the inside of the crystal grains. The additional element is preferably at least one element selected from a group consisting of Ti, Zr, Hf, Cr, Co, Al, Sn, Ni, Mg, and Ag. This Cu wiring is formed by forming a Cu polycrystalline film, forming an additional element layer on this Cu film, and diffusing this additional element from the additional element layer into the Cu film. This copper alloy for wiring is preferred as metal wiring formed for a semiconductor device.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: June 9, 2009
    Assignee: NEC Corporation
    Inventors: Makoto Ueki, Masayuki Hiroi, Nobuyuki Ikarashi, Yoshihiro Hayashi
  • Publication number: 20090014887
    Abstract: In an insulating film structure having a barrier insulating film, a via interlayer insulating film, a wiring interlayer insulating film, and a hard mask film stacked in this order on an underlayer wiring, a via hole pattern is formed in the insulating film structure, then a groove pattern is formed in the hard mask film, and a grove is formed in the insulating film structure using this as a mask. According to the prior art, the via side wall is oxidized equally severely in the both processes. The trench side wall is oxidized severely in the via first process according to the prior art, whereas, according to the present invention, the oxidation thereof is suppressed to such an extent that an almost non-oxidized state can be created.
    Type: Application
    Filed: January 5, 2007
    Publication date: January 15, 2009
    Applicant: NEC CORPORATION
    Inventors: Hiroto Ohtake, Munehiro Tada, Makoto Ueki, Yoshihiro Hayashi
  • Publication number: 20060113685
    Abstract: A wiring metal contains a polycrystal of copper (Cu) as a primary element and an additional element other than Cu, and concentration of the additional element is, at crystal grain boundaries composing the Cu polycrystal and in vicinities of the crystal grain boundaries, higher than that of the inside of the crystal grains. The additional element is preferably at least one element selected from a group consisting of Ti, Zr, Hf, Cr, Co, Al, Sn, Ni, Mg, and Ag. This Cu wiring is formed by forming a Cu polycrystalline film, forming an additional element layer on this Cu film, and diffusing this additional element from the additional element layer into the Cu film. This copper alloy for wiring is preferred as metal wiring formed for a semiconductor device.
    Type: Application
    Filed: September 22, 2003
    Publication date: June 1, 2006
    Applicant: NEC Corporation
    Inventors: Makoto Ueki, Masayuki Hiroi, Nobuyuki Ikarashi, Yoshihiro Hayashi
  • Patent number: 6916203
    Abstract: A water-proof modular connector includes a plug socket to be fixed to an object, and a plug detachably coupled to the plug socket. The plug socket includes a plug socket body having first and second socket-openings directing outwardly and inwardly of the object, respectively, a modular jack unit having first and second jack-openings directed in opposite directions to each other, and a holder which holds the modular jack in the plug socket body such that the first and second jack-openings are directed to the first and second socket-openings, respectively. The plug includes a plug body through which a communication cable passes, a modular plug connected to the communication cable, a first positioning unit which positions the modular plug in the plug body, a cap which detachably couples the plug body to the plug socket body such that the modular plug is inserted into the first socket-opening, and a water-proof unit ensuring water-proof between the plug socket body and the plug body.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: July 12, 2005
    Assignee: NEC Corporation
    Inventors: Takashi Oyamada, Makoto Ueki
  • Publication number: 20040242067
    Abstract: A water-proof modular connector includes a plug socket to be fixed to an object, and a plug detachably coupled to the plug socket. The plug socket includes a plug socket body having first and second socket-openings directing outwardly and inwardly of the object, respectively, a modular jack unit having first and second jack-openings directed in opposite directions to each other, and a holder which holds the modular jack in the plug socket body such that the first and second jack-openings are directed to the first and second socket-openings, respectively. The plug includes a plug body through which a communication cable passes, a modular plug connected to the communication cable, a first positioning unit which positions the modular plug in the plug body, a cap which detachably couples the plug body to the plug socket body such that the modular plug is inserted into the first socket-opening, and a water-proof unit ensuring water-proof between the plug socket body and the plug body.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 2, 2004
    Applicant: NEC Corporation
    Inventors: Takashi Oyamada, Makoto Ueki