Patents by Inventor Malay Kumar Ganai

Malay Kumar Ganai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6473884
    Abstract: A method and system for equivalence checking of logical circuits using iterative circuit reduction and satisfiability techniques provide improved performance in computer-based verification and design tools. By intertwining a structural satisfiability solver and binary decision diagram functional circuit reduction method, computer-based tools can make more efficient use of memory and decrease computation time required to equivalence check large logical networks. Using the circuit reduction technique back-to-back with the simulation technique, optimum local and global circuit reduction are simultaneously achieved. By iterating between the structural and functional techniques, and adjusting the size of sub-networks being analyzed within a larger network, sub-networks can be reduced or eliminated, decreasing the amount of memory required to represent the next larger inclusive network.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: October 29, 2002
    Assignee: International Business Machines Corporation
    Inventors: Malay Kumar Ganai, Geert Janssen, Florian Karl Krohm, Andreas Kuehlmann, Viresh Paruthi