Abstract: A baseband receiver particularly well-suited for wireless applications utilizes a dual-port DAC in a successive-approximation ADC, where the dual-port DAC replaces the separate pair of single port conventional DACs and is therefore shared by the I and Q down-converted components. The use of a dual-port DAC results in significant size and power savings over conventional arrangements.

Abstract: A phase shifter network receives at an input node an input clock signal which does not contain higher order harmonics and generates first and second phase-shifted clock signals which are 90° apart and which have the same frequency as the input clock signal. First and second voltage comparators receive the first and second phase-shifted clock signals, respectively, and generates first and second squared clock signals, respectively, which are 90° apart and which have the same frequency as the input clock signal. A combiner combines the first and second squared clock signals to produce an output clock signal having twice the frequency of the input clock signal.

Abstract: There is disclosed an integrated circuit including a digital-to-analog converter in which a resistor string is adapted to be coupled to a reference source. The resistor string includes a plurality of serially coupled impedances defining intermediate taps at the junctions thereof. A first plurality of switches are coupled between a first output node and respective ones of the intermediate taps. A first selection circuit receives a first digitally coded signal and is coupled to each switch in the first plurality of switches. The first selection circuit selectively switches the first plurality of switches to predetermined states depending upon a first digitally coded signal provided thereto, to generate a first analog output. A second plurality of switches are coupled between a second output node and respective ones of the intermediate taps.

Abstract: An improved sense amplifier for accessing data stored in a flash memory or other memory, wherein the improvement consists of adding a variable impedance switch transistor to a conventional sense amplifier having a fixed impedance. The switch transistor has a low impedance for fast settling of charge during the pre-charge state of the flash memory, and has a high impedance during the sensing state of the flash memory for achieving a high gain and thus faster access of stored data than conventional sense amplifiers. The present invention also provides for better matching of sense amplifier transistors, thereby decreasing variations in performance between different transistors.

Abstract: An integrated circuit device has an analog block connected to a sigma-delta modulator. Analog signals from internal nodes in the analog block are fed to the sigma-delta modulator. The sigma-delta modulator produces digital representations of the analog signals. The digital representations are forwarded to a processor for analysis of the internal node signal. The above structure may be integrated within the framework of existing digital test structures to form a built-in self-test scheme.

Abstract: An integrated circuit includes topological features for weakening or otherwise modifying a blowable fuse in order to decrease the current needed to blow the fuse. This allows a decrease in the size of the circuit components which are needed to supply the current for blowing the fuse, in turn allowing compaction of the layout of the circuitry needed to blow the fuse. To this end, topological features are used to deform the shape of or otherwise modify the fuse, in turn increasing the resistance of the fuse or introducing flaws that allow the fuse to blow at a lower current.

Abstract: An integrated circuit for converting an analog input signal to a corresponding digital signal. The integrated circuit has selectable operational modes and comprises a digital-to analog converter (DAC) to produce a variable reference voltage, a sample and hold circuit for sampling and holding the analog input signal to produce a sampled and held analog input signal, a comparator for comparing the reference voltage with the sampled and held analog input signal to produce a difference signal, a converter to convert the difference signal into the digital signal and related to the difference signal, and a selector for the operational modes. The operational modes may be one of a single ended current mode, a single ended voltage mode, a differential current mode and a differential voltage mode.

Abstract: Blowable fuses on an integrated circuit are programmed in software, responsive to the control of an addressable memory which communicates with the peripheral data bus of a digital processor to allow increased flexibility of the programming operation, and to allow for correction both during the manufacturing process and after packaging of the manufactured integrated circuit. In a preferred embodiment, the fuses are operated (i.e., blown) responsive to transistor switching elements present on the integrated circuit and which are controlled by the addressable memory. The switching elements, and the associated fuses, can be accessed through software in similar fashion to any other peripheral device. The preferred addressable memory includes an instruction register and a data register, which are loaded from and write to the peripheral data bus. Internally, the data register includes an array of registers corresponding to the fuse links with which the system is associated.