Patents by Inventor Malcolm J. Rush
Malcolm J. Rush has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10372579Abstract: A fault-tolerant failsafe computer voting system including a first voting module that generates a first key based on a comparison between a first data packet and a copy of a second data packet. The first voting module determines whether the first key and a second key are valid keys. The second data packet is a copy of the first data packet. A second voting module generates the second key based on a comparison between the second data packet and a copy of the first data packet. A processing module generates an outgoing data packet based on the first data packet in response to determining whether the first key and the second key are valid keys. The first voting module is inhibited from generating the second key and the second voting module is inhibited from generating the first key.Type: GrantFiled: March 10, 2017Date of Patent: August 6, 2019Assignee: Artesyn Embedded Computing, Inc.Inventors: Gary Perkins, Malcolm J. Rush, Andrew Porter
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Patent number: 10338995Abstract: A system includes a first fail-safe chassis (FSC) receives module health signals from a plurality of modules and generates a first chassis health signal. The chassis health signal includes first and second portions. A plurality of modules receives the chassis health signal. The FSC determines whether one or more of the module heals signals indicates an associated module is unhealthy by comparing the module health signals and a predetermined health value. The FSC selectively de-asserts the first chassis health signal based on the comparison. A second FSC operates similarly. A safety relay box determines the health of the system in accordance with the first and second chassis health signals.Type: GrantFiled: March 10, 2017Date of Patent: July 2, 2019Assignee: Artesyn Embedded Computing, Inc.Inventors: Gary Perkins, Malcolm J. Rush, Martin Peter John Cornes, Andrew Porter, Rajesh Mangal
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Publication number: 20180260297Abstract: A fault-tolerant failsafe computer voting system including a first voting module that generates a first key based on a comparison between a first data packet and a copy of a second data packet. The first voting module determines whether the first key and a second key are valid keys. The second data packet is a copy of the first data packet. A second voting module generates the second key based on a comparison between the second data packet and a copy of the first data packet. A processing module generates an outgoing data packet based on the first data packet in response to determining whether the first key and the second key are valid keys. The first voting module is inhibited from generating the second key and the second voting module is inhibited from generating the first key.Type: ApplicationFiled: March 10, 2017Publication date: September 13, 2018Inventors: Gary PERKINS, Malcolm J. RUSH, Andrew PORTER
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Publication number: 20180260272Abstract: A system includes a first fail-safe chassis (FSC) receives module health signals from a plurality of modules and generates a first chassis health signal. The chassis health signal includes first and second portions. A plurality of modules receives the chassis health signal. The FSC determines whether one or more of the module heals signals indicates an associated module is unhealthy by comparing the module health signals and a predetermined health value. The FSC selectively de-asserts the first chassis health signal based on the comparison. A second FSC operates similarly. A safety relay box determines the health of the system in accordance with the first and second chassis health signals.Type: ApplicationFiled: March 10, 2017Publication date: September 13, 2018Inventors: Gary PERKINS, Malcolm J. RUSH, Martin Peter John CORNES, Andrew PORTER, Rajesh MANGAL
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Publication number: 20140181799Abstract: A firmware upgrade computer system includes a bank select switch that generates a bank select signal. The system further includes a bank module that includes a first firmware code and a second bank module that includes a second firmware code. The system also includes a control module that determines whether the first bank module and the second bank module is a selected bank based on the bank select signal. The control module determines whether the first bank module and the second bank module is a nonselected bank based on the bank select signal. The control module selectively instructs the selected bank to communicate one of the first firmware code and the second firmware code to the nonselected bank. The system also includes a storage module that stores a selected bank value indicative of the selected bank.Type: ApplicationFiled: March 12, 2013Publication date: June 26, 2014Applicant: EMERSON NETWORK POWER - EMBEDDED COMPUTING, INC.Inventors: Rajesh MANGAL, Malcolm J. RUSH, Richard D. SMITH, James HOLBROOK
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Patent number: 7254659Abstract: A method of performing a VMEbus split-read transaction (701) includes providing a master VMEbus module (502) coupled to a slave VMEbus module (504) through a VMEbus network (506). The master VMEbus module initiates a VMEbus split-read transaction request (524) in a VME address encoding phase (601) to the slave VMEbus module, where the VMEbus split-read transaction request comprises a return address (660) for the VMEbus master module in the VMEbus address encoding phase, and where the VMEbus split-read transaction request requests a set of data (544). The master VMEbus module releases the VMEbus network and the slave VMEbus module acquires the VMEbus network. The slave VMEbus module places the set of data on the VMEbus network, where the set of data comprises the return address for the VMEbus master module, and the master VMEbus module retrieves the set of data.Type: GrantFiled: July 26, 2004Date of Patent: August 7, 2007Assignee: Motorola, Inc.Inventors: Jeffrey M. Harris, Malcolm J. Rush
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Patent number: 7155547Abstract: A multi-service platform system (100) includes a monolithic backplane (104), a slot (108) coupled to the monolithic backplane, wherein the slot is coupled to receive a payload module (102), and a backplane data device (106) integrally embedded in the monolithic backplane, wherein the backplane data device comprises backplane system data (424) for communication to the payload module when the payload module is coupled to the monolithic backplane.Type: GrantFiled: July 2, 2004Date of Patent: December 26, 2006Assignee: Motorola, Inc.Inventors: Sarah M. Wolfe, Jeffrey M. Harris, Malcolm J. Rush
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Patent number: 7155549Abstract: A method of performing a VMEbus split-read transaction (401) includes providing a master VMEbus module (102) coupled to a slave VMEbus module (104) through a VMEbus network (106). The master VMEbus module initiates a VMEbus split-read transaction request (124) in a VME address encoding phase (201) to the slave VMEbus module, where the VMEbus split-read transaction request includes a tag identifier (206, 306) in the VMEbus address encoding phase corresponding to the VMEbus split-read transaction request, where the tag identifier is unique to the VMEbus split-read transaction request, and where the VMEbus split-read transaction request requests a set of data (144). The master VMEbus module releases the VMEbus network and the slave VMEbus module acquires the VMEbus network. The slave VMEbus module places the set of data on the VMEbus network, wherein the set of data includes the tag identifier.Type: GrantFiled: July 26, 2004Date of Patent: December 26, 2006Inventors: Malcolm J. Rush, Jeffrey M. Harris
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Patent number: 6996643Abstract: In a multi-service platform system (103), a method of transfer speed (119) negotiation includes an initiator VME module (402) communicating a negotiation code (406) to a responder VME module (404) using a two edge source synchronous protocol. If the responder VME module recognizes the negotiation code, the responder VME module communicating to the initiator VME module a negotiation ready signal (408). The initiator VME module and the responder VME module auto-negotiating for a transfer speed (119) and setting a negotiated transfer speed between the initiator VME module and the responder VME module.Type: GrantFiled: April 29, 2004Date of Patent: February 7, 2006Assignee: Motorola, Inc.Inventors: Sarah M. Wolfe, Jeffrey M. Harris, Malcolm J. Rush