Patents by Inventor Malcolm Scott
Malcolm Scott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250148341Abstract: Define a plurality of qubit collision types and a plurality of constraints. For a group of qubits, use a computerized mixed-integer programming solver to, subject to the constraints, iteratively minimize collisions by minimizing a sum of products of weights multiplied by an amount of frequency collisions for given ones of the constraints of each one of the collision types. Output a frequency tuning plan for the group of qubits, based on the iterative minimization. Facilitate tuning physical qubits in accordance with the frequency tuning plan.Type: ApplicationFiled: November 3, 2023Publication date: May 8, 2025Inventors: Takashi Ido, NAOKI KANAZAWA, Jared Barney Hertzberg, Eric Zhang, Sami Rosenblatt, Jason S. Orcutt, Malcolm Scott Carroll
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Publication number: 20250068782Abstract: Generate an initial tuning plan for a quantum computing device based on an initial screening; determine whether yield rate according to the initial tuning plan is acceptable, based on real-time analytics; facilitate carrying out tuning based on the initial tuning plan based on the determining indicating that the yield rate according to the tuning plan is acceptable; and repeat the determining and facilitating carrying out tuning steps based on tuning being incomplete and the yield rate according to the initial tuning plan being acceptable.Type: ApplicationFiled: August 21, 2023Publication date: February 27, 2025Inventors: Eric Zhang, Jason S. Orcutt, Jared Barney Hertzberg, Malcolm Scott Carroll, Takashi Ido, NAOKI KANAZAWA
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Patent number: 12236317Abstract: One or more systems, devices, computer program products and/or computer-implemented methods of use provided herein relate to analysis of qubit coherence parameters of a physical qubit layout of a quantum computer. A system can comprise a pulse component for transmitting signals to a qubit, a readout component for receiving signals form the qubit, a memory that stores computer executable component, and a processor that executes the computer executable components stored in the memory. The computer executable components are executable to cause the pulse component to generate a first pulse to drive the qubit, cause the pulse component to generate a second pulse comprising an Autler-Townes off-resonant tone, and determine a probability relative to the qubit, in view of a shift of the qubit to a shifted frequency caused by the second pulse.Type: GrantFiled: March 14, 2022Date of Patent: February 25, 2025Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Malcolm Scott Carroll, Sami Rosenblatt, Abhinav Kandala
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Publication number: 20240216493Abstract: The disclosure provides compositions, methods of treatment, and methods of making and using compositions to deliver a nucleic acid to a subject. Compositions described herein include lipid carriers, optionally including an inorganic particle, capable of admixing with nucleic acids. Nucleic acids provided herein include those encoding for cancer antigens (full length proteins or fragments) as well as antibodies. Methods of using the compositions as a therapeutic vaccine for the treatment of a cancer are also provided.Type: ApplicationFiled: March 15, 2024Publication date: July 4, 2024Inventors: Steven Gregory Reed, Darrick Albert Carter, Malcolm Scott Duthie, Lars Peter Aksel Berglund, Jesse Hong-Sae Erasmus, Jiho Kim
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Publication number: 20240185106Abstract: One or more systems, devices, computer program products and/or computer-implemented methods of use provided herein relate to determining estimated energy relaxation times of qubits. A system can comprise a memory configured to store computer executable components; and a processor configured to execute the computer executable components stored in the memory, wherein the computer executable components comprise a sampling component configured to sample a plurality of measurements of an energy relaxation time of a qubit at individual shifted qubit frequencies of a plurality of shifted qubit frequencies of the qubit; and an analysis component configured to perform an analysis, based on a protocol, to determine a correlation frequency-length between individual energy relaxation times measured at the individual shifted qubit frequencies.Type: ApplicationFiled: September 28, 2022Publication date: June 6, 2024Inventors: Malcolm Scott Carroll, Sami Rosenblatt, Abhinav Kandala
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Publication number: 20230289400Abstract: One or more systems, devices, computer program products and/or computer-implemented methods of use provided herein relate to determining estimated true relaxation times of qubits absent measurement of entire T1 decay times of the qubits. A system can comprise a memory that stores computer executable components; and a processor that executes the computer executable components stored in the memory, wherein the computer executable components are executable to cause, by the processor, one or more energy relaxation measurements, using a pulse generation, at the qubit frequency for a qubit and at a plurality of shifted frequencies for the qubit, and to determine, by the processor, a true average relaxation time of the qubit based on the plurality of energy relaxation measurements.Type: ApplicationFiled: March 14, 2022Publication date: September 14, 2023Inventors: Malcolm Scott Carroll, Sami Rosenblatt, Abhinav Kandala
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Publication number: 20230289642Abstract: One or more systems, devices, computer program products and/or computer-implemented methods of use provided herein relate to analysis of qubit coherence parameters of a physical qubit layout of a quantum computer. A system can comprise a pulse component for transmitting signals to a qubit, a readout component for receiving signals form the qubit, a memory that stores computer executable component, and a processor that executes the computer executable components stored in the memory. The computer executable components are executable to cause the pulse component to generate a first pulse to drive the qubit, cause the pulse component to generate a second pulse comprising an Autler-Townes off-resonant tone, and determine a probability relative to the qubit, in view of a shift of the qubit to a shifted frequency caused by the second pulse.Type: ApplicationFiled: March 14, 2022Publication date: September 14, 2023Inventors: Malcolm Scott Carroll, Sami Rosenblatt, Abhinav Kandala
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Patent number: 11186360Abstract: Methods of retracting a strut assembly for stowing aircraft landing gear comprise longitudinally translating an upper bulkhead within an upper tubular housing from a lower position to an upper position by pressurizing an upper bulkhead space between an upper plate of the upper bulkhead and an upper bulkhead restriction structure that is fixed to the upper tubular housing. Other methods of retracting a strut assembly for stowing aircraft landing gear comprise flowing liquid from an upper liquid chamber positioned above an upper bulkhead within an upper tubular housing to a recoil chamber, wherein during the flowing, the liquid is prevented from passing from the recoil chamber to a pressure chamber that is defined between the upper bulkhead and a lower bulkhead, thereby longitudinally translating a lower tubular housing upward.Type: GrantFiled: December 13, 2019Date of Patent: November 30, 2021Assignee: The Boeing CompanyInventors: Justin Duane Cottet, James E. Cusworth, Malcolm Scott Bryant, George Sonnenburg
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Publication number: 20200115042Abstract: Methods of retracting a strut assembly for stowing aircraft landing gear comprise longitudinally translating an upper bulkhead within an upper tubular housing from a lower position to an upper position by pressurizing an upper bulkhead space between an upper plate of the upper bulkhead and an upper bulkhead restriction structure that is fixed to the upper tubular housing. Other methods of retracting a strut assembly for stowing aircraft landing gear comprise flowing liquid from an upper liquid chamber positioned above an upper bulkhead within an upper tubular housing to a recoil chamber, wherein during the flowing, the liquid is prevented from passing from the recoil chamber to a pressure chamber that is defined between the upper bulkhead and a lower bulkhead, thereby longitudinally translating a lower tubular housing upward.Type: ApplicationFiled: December 13, 2019Publication date: April 16, 2020Inventors: Justin Duane Cottet, James E. Cusworth, Malcolm Scott Bryant, George Sonnenburg
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Patent number: 10562614Abstract: An aircraft landing gear structure includes a strut assembly configured to transition between a compressed configuration, an extended configuration, and a retracted configuration. The strut assembly has a compressed length, an extended length, and a retracted length, such that the compressed length and retracted length are less than the extended length. The strut assembly includes an upper tubular housing, an upper bulkhead configured to be translated between a lower position and an upper position, a lower tubular housing operatively coupled to the upper tubular housing, a lower bulkhead supported by the lower tubular housing, and a pressure chamber defined between the lower bulkhead and the upper bulkhead. A volume of strut liquid and a mass of strut gas are positioned within the pressure chamber. A method of retracting a strut assembly includes longitudinally translating an upper bulkhead within an upper tubular housing from a lower position to an upper position.Type: GrantFiled: September 21, 2016Date of Patent: February 18, 2020Assignee: The Boeing CompanyInventors: Justin Duane Cottet, James E. Cusworth, Malcolm Scott Bryant, George Sonnenburg
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Patent number: 10049957Abstract: A method, system, and computer program product for on-chip control of thermal cycling in an integrated circuit (IC) are provided in the illustrative embodiments. A first circuit is configured on the IC for adjusting a first voltage being applied to a first part of the IC. A first temperature of the first part is measured at a first time. A determination is made that the first temperature is outside a temperature range defined by an upper temperature threshold and a lower temperature threshold. The first voltage is adjusted by reducing the first voltage when the first temperature exceeds the upper temperature threshold and by increasing the first voltage when the first temperature is below the lower temperature threshold, thereby causing the first temperature of the first part to attain a value within the temperature range.Type: GrantFiled: March 3, 2011Date of Patent: August 14, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Malcolm Scott Allen-Ware, John Bruce Carter, Elmootazbellah Nabil Elnozahy, Wei Huang
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Publication number: 20180079494Abstract: An aircraft landing gear structure includes a strut assembly configured to transition between a compressed configuration, an extended configuration, and a retracted configuration. The strut assembly has a compressed length, an extended length, and a retracted length, such that the compressed length and retracted length are less than the extended length. The strut assembly includes an upper tubular housing, an upper bulkhead configured to be translated between a lower position and an upper position, a lower tubular housing operatively coupled to the upper tubular housing, a lower bulkhead supported by the lower tubular housing, and a pressure chamber defined between the lower bulkhead and the upper bulkhead. A volume of strut liquid and a mass of strut gas are positioned within the pressure chamber. A method of retracting a strut assembly includes longitudinally translating an upper bulkhead within an upper tubular housing from a lower position to an upper position.Type: ApplicationFiled: September 21, 2016Publication date: March 22, 2018Inventors: Justin Duane Cottet, James E. Cusworth, Malcolm Scott Bryant, George Sonnenburg
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Patent number: 9298249Abstract: A partition that is executed by multiple processing nodes. Each node includes multiple cores and each of the cores has a frequency that can be set. A first frequency range is provided to the cores. Each core, when executing the identified partition, sets its frequency within the first frequency range. Frequency metrics are gathered from the cores running the partition by the nodes. The gathered frequency metrics are received and analyzed by a hypervisor that determines a second frequency range to use for the partition, with the second frequency range being different from the first frequency range. The second frequency range is provided to the cores at the nodes executing the identified partition. When the cores execute the identified partition, they use a frequencies within the second frequency range.Type: GrantFiled: March 11, 2013Date of Patent: March 29, 2016Assignee: International Business Machines CorporationInventors: Andrew Geissler, Raymond J. Harrington, Hye-Young McCreary, Freeman Leigh Rawson, III, Malcolm Scott Ware
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Patent number: 9223326Abstract: An approach is provided in which a master thermal controller utilizes a primary fan manager to control fans included in a computer system to cool various devices. When the master thermal controller determines that the primary fan manager is unresponsive, the master thermal controller transfers master thermal control to a backup thermal controller. The backup thermal controller creates fan control information based upon sensor information corresponding to the various devices, and sends the fan control information to a backup fan manager. In turn, the backup fan manager adjusts the speed of the fans according to the fan control information.Type: GrantFiled: July 22, 2012Date of Patent: December 29, 2015Assignee: International Business Machines CorporationInventors: Malcolm Scott Allen-Ware, Timothy Glen Hallett, Wei Huang, Charles Robert Lefurgy, Glenn Rueban Miles, Guillermo Jesus Silva
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Patent number: 9009503Abstract: A method, system, and computer program product for relating a data processing system with a power branch circuit are provided in the illustrative embodiments. Each signal in a set of signals is combined with a power signal to form a set of combination signals, the power signal including a first power usage by the data processing system and a second power usage by a modulating signal. An amplitude of a corresponding signal in each combined signal in the set of combined signals is determined over a period. Using a discriminating logic, a determination is made whether the modulating signal is present in the power signal. Responsive to the discriminating logic producing an affirmative result, the data processing system is related with the power branch circuit.Type: GrantFiled: July 5, 2012Date of Patent: April 14, 2015Assignee: International Business Machines CorporationInventors: Malcolm Scott Allen-Ware, Wael El-Essawy, Alexandre Peixoto Ferreira, Thomas Walter Keller, Jr., Karthick Rajamani, Juan Carlos Rubio
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Patent number: 8990831Abstract: A method for a framework for scheduling tasks in a multi-core processor or multiprocessor system is provided in the illustrative embodiments. A thread is selected according to an order in a scheduling discipline, the thread being a thread of an application executing in the data processing system, the thread forming the leader thread in a bundle of threads. A value of a core attribute in a set of core attributes is determined according to a corresponding thread attribute in a set of thread attributes associated with the leader thread. A determination is made whether a second thread can be added to the bundle such that the bundle including the second thread will satisfy a policy. If the determining is affirmative, the second thread is added to the bundle. The bundle is scheduled for execution using a core of the multi-core processor.Type: GrantFiled: March 7, 2012Date of Patent: March 24, 2015Assignee: International Business Machines CorporationInventors: Elmootazbellah Nabil Elnozahy, Heather Lynn Hanson, James Lyle Peterson, Freeman Leigh Rawson, III, Malcolm Scott Ware
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Patent number: 8850240Abstract: A method for relating a data processing system with a power branch circuit is provided in the illustrative embodiments. A second signal is combined with a power signal to form a combination signal, the power signal including a first power usage by the data processing system and a second power usage by a modulating signal. The second signal is synchronized with the modulating signal in the power signal. A determination is made whether an amplitude of a frequency of the second signal is increasing in the combined signal over a period. Responsive to the determining being affirmative, the data processing system is related with the power branch circuit.Type: GrantFiled: April 30, 2012Date of Patent: September 30, 2014Assignee: International Business Machines CorporationInventors: Malcolm Scott Allen-Ware, Wael R El-Essawy, Alexandre Peixoto Ferreira, Thomas Walter Keller, Jr., Juan Carlos Rubio
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Patent number: 8778956Abstract: The present invention is directed to novel hydroxy alkyl substituted 1,3,8-triazaspiro[4.5]decan-4-one derivatives of the general formula wherein all variables are as defined herein, useful in the treatment of disorders and conditions mediated by the ORL-1 G-protein coupled receptor. More particularly, the compounds of the present invention are useful in the treatment of disorders and conditions such as anxiety, depression, panic, dementia, mania, bipolar disorder, substance abuse, neuropathic pain, acute pain, chronic pain, migraine, asthma, cough, psychosis, schizophrenia, epilepsy, hypertension, obesity, eating disorders, cravings, diabetes, cardiac arrhythmia, irritable bowel syndrome, Crohn's disease, urinary incontinence, adrenal disorders, attention deficit disorder (ADD), attention deficit hyperactivity disorder (ADHD), Alzheimer's disease, for improved cognition or memory and for mood stabilization.Type: GrantFiled: December 3, 2008Date of Patent: July 15, 2014Assignee: Janssen Pharmaceutica NVInventors: Kathleen Battista, Gilles Bignan, Peter J. Connolly, Allen B. Reitz, Tina Morgan Ross, Malcolm Scott, Steven A. Middleton, Michael Orsini
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Patent number: 8779846Abstract: A method for improving the performance of a digital circuit is provided in the illustrative embodiments. A real frequency of operation of the digital circuit is adjusted using a control loop in the digital circuit, the adjusting the real frequency being responsive to a change in an operating condition of the digital circuit. A measurement of a current drawn by the digital circuit is received from a voltage regulator supplying electrical power to the digital circuit. An over-current target current value is received. A voltage output from the voltage regulator to the digital circuit is adjusted such that the current drawn by the digital circuit does not exceed the over-current target current value.Type: GrantFiled: July 16, 2012Date of Patent: July 15, 2014Assignee: International Business Machines CorporationInventors: Malcolm Scott Allen-Ware, John Bruce Carter, Heather Lynn Hanson, Wei Huang, Charles Robert Lefurgy, Karthick Rajamani
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Publication number: 20140025208Abstract: An approach is provided in which a master thermal controller utilizes a primary fan manager to control fans included in a computer system to cool various devices. When the master thermal controller determines that the primary fan manager is unresponsive, the master thermal controller transfers master thermal control to a backup thermal controller. The backup thermal controller creates fan control information based upon sensor information corresponding to the various devices, and sends the fan control information to a backup fan manager. In turn, the backup fan manager adjusts the speed of the fans according to the fan control information.Type: ApplicationFiled: July 22, 2012Publication date: January 23, 2014Applicant: International Business Machines CorporationInventors: Malcolm Scott Allen-Ware, Timothy Glen Hallett, Wei Huang, Charles Robert Lefurgy, Glenn Rueban Miles, Guillermo Jesus Silva