Patents by Inventor Mallikarjunaswamy S. Shekar

Mallikarjunaswamy S. Shekar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5471075
    Abstract: A semiconductor switching device includes a plurality of adjacent and parallel-connected switching cells in a semiconductor substrate. Each cell includes a thyristor having a floating emitter region and a trench-gate field effect transistor (TFET) for providing turn-on and turn-off control of the thyristor. In one embodiment of the switching device, parasitic thyristor latch-up is suppressed by using a dual-channel TFET which forms both inversion-layer and accumulation-layer channel connections in series between respective floating emitter regions and the cathode contact. In another embodiment, parasitic thyristor latch-up is prevented by joining floating emitter regions of a pair of adjacent cells to thereby eliminate a parasitic P-N-P-N path between the anode and cathode contacts.
    Type: Grant
    Filed: May 26, 1994
    Date of Patent: November 28, 1995
    Assignee: North Carolina State University
    Inventors: Mallikarjunaswamy S. Shekar, B. Jayant Baliga, Jacek Korec
  • Patent number: 5319222
    Abstract: An emitter switched thyristor structure providing on-state current saturation capability is disclosed herein. The thyristor structure includes anode and cathode electrodes, and a remote electrode connected to the cathode electrode. A multi-layer body of semiconductor material has a first surface and includes regenerative and non-regenerative portions each operatively coupled between the anode and cathode electrodes. The regenerative portion includes adjacent first, second, third and fourth regions of alternating conductivity type arranged respectively in series, wherein the remote electrode is in electrical contact with the second region and the anode electrode is in electrical contact with the fourth region. The emitter-switched thyristor is turned on by applying an enabling voltage to an insulated gate electrode disposed adjacent the first surface such that a conductive channel is created in the non-regenerative portion via modulation of the conductivity therein.
    Type: Grant
    Filed: April 29, 1992
    Date of Patent: June 7, 1994
    Assignee: North Carolina State University
    Inventors: Mallikarjunaswamy S. Shekar, Bantval J. Baliga
  • Patent number: 5317171
    Abstract: An emitter-switched thyristor structure includes a remote turn-off electrode for reducing turn-off time and increasing maximum controllable operating current. The switched thyristor structure further includes anode and cathode electrodes, with the remote electrode being connected to the cathode electrode. A multi-layer body of semiconductor material has a first surface, as well as regenerative and non-regenerative portions each operatively coupled between the anode and cathode electrodes. The regenerative portion includes adjacent first, second, third and fourth regions of alternating conductivity type arranged respectively in series. Electrical contacts exist between the remote electrode and the second region, as well as between the anode electrode and the fourth region. The thyristor is turned on by applying an enabling voltage to an insulated gate electrode disposed adjacent the first surface such that a conductive channel is created in the regenerative portion via modulation of the conductivity therein.
    Type: Grant
    Filed: April 29, 1992
    Date of Patent: May 31, 1994
    Assignee: North Carolina State University
    Inventors: Mallikarjunaswamy S. Shekar, Bantval J. Baliga
  • Patent number: 5294816
    Abstract: An emitter switched thyristor with base resistance control for preventing parasitic latch-up includes a P-N-P-N main thyristor with an N.sup.+ floating emitter for MOS-gated controlled turn-on and a lateral P-channel MOSFET for shunting hole current in a second base region to a P.sup.+ diverting region electrically connected to the cathode. The P-channel MOSFET is enabled by the application of a negative gate voltage to form a P-type inversion layer between the second base region and the P.sup.+ diverter region, thus reducing the resistance between the cathode and the second base region and raising the holding current of the emitter switched thyristor to above the operating current level. The formation of an alternative current path to the cathode has the further effect of reducing the forward bias across the base-emitter junction of an adjacent parasitic thyristor to thereby prevent the sustained regenerative action of the parasitic thyristor.
    Type: Grant
    Filed: June 10, 1992
    Date of Patent: March 15, 1994
    Assignee: North Carolina State University at Raleigh
    Inventors: Mallikarjunaswamy S. Shekar, Mahalingam Nandakumar, Bantval J. Baliga
  • Patent number: 5293054
    Abstract: An emitter switched thyristor without parasitic thyristor latch-up susceptibility includes a thyristor having an anode region, a first base region, a second base region in the first base region and an emitter region of first conductivity type in the second base region. An electrical connection is provided between the emitter region and the cathode contact by a field effect transistor in the first base region. The transistor is positioned adjacent the second base region and includes a source electrically connected to the emitter region by a metal strap on the surface of the substrate. The drain of the transistor is electrically connected to the cathode contact and has a conductivity type opposite the conductivity type of the first base region. Accordingly, the cathode contact and anode contact are not separated by a four layer parasitic thyristor. Parasitic latch-up operation is thereby eliminated.
    Type: Grant
    Filed: November 23, 1992
    Date of Patent: March 8, 1994
    Assignee: North Carolina State University at Raleigh
    Inventors: Mallikarjunaswamy S. Shekar, Bantval J. Baliga