Patents by Inventor Mamoru Iesaka
Mamoru Iesaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11335821Abstract: Low noise silicon-germanium (SiGe) image sensor. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array disposed in a semiconductor substrate. The photodiodes of an individual pixel are configured to receive an incoming light through an illuminated surface of the semiconductor substrate. The semiconductor substrate includes a first layer of semiconductor material having silicon (Si); and a second layer of semiconductor material having silicon germanium (Si1-xGex). A concentration x of Ge changes gradually through at least a portion of thickness of the second layer. Each photodiode includes a first doped region extending through the first layer of semiconductor material and the second layer of semiconductor material; and a second doped region extending through the first layer of semiconductor material and the second layer of semiconductor material.Type: GrantFiled: April 30, 2020Date of Patent: May 17, 2022Assignee: OMNIVISION TECHNOLOGIES, INC.Inventors: Mamoru Iesaka, Woon Il Choi, Sohei Manabe
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Publication number: 20210343882Abstract: Low noise silicon-germanium (SiGe) image sensor. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array disposed in a semiconductor substrate. The photodiodes of an individual pixel are configured to receive an incoming light through an illuminated surface of the semiconductor substrate. The semiconductor substrate includes a first layer of semiconductor material having silicon (Si); and a second layer of semiconductor material having silicon germanium (Si1-xGex). A concentration x of Ge changes gradually through at least a portion of thickness of the second layer. Each photodiode includes a first doped region extending through the first layer of semiconductor material and the second layer of semiconductor material; and a second doped region extending through the first layer of semiconductor material and the second layer of semiconductor material.Type: ApplicationFiled: April 30, 2020Publication date: November 4, 2021Inventors: Mamoru Iesaka, Woon Il Choi, Sohei Manabe
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Patent number: 9706186Abstract: An imaging apparatus including an image generating section that generates first parallax image data based on the output of the first pixel and second parallax image data based on the output of the second pixel. When the imaging element captures an image of an object point located in an unfocused region on the optical axis, a pixel value of a center pixel corresponding to the optical axis in the first parallax image data is greater than or equal to 50% of a pixel value of a peak pixel in the first parallax image data, and a pixel value of a center pixel corresponding to the optical axis in the second parallax image data is greater than or equal to 50% of a pixel value of a peak pixel in the second parallax image data.Type: GrantFiled: December 28, 2015Date of Patent: July 11, 2017Assignee: NIKON CORPORATIONInventors: Kiyoshige Shibazaki, Muneki Hamashima, Susumu Mori, Fumiki Nakamura, Mamoru Iesaka, Junya Hagiwara, Kenichi Ishiga
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Publication number: 20160119608Abstract: An imaging apparatus including an image generating section that generates first parallax image data based on the output of the first pixel and second parallax image data based on the output of the second pixel. When the imaging element captures an image of an object point located in an unfocused region on the optical axis, a pixel value of a center pixel corresponding to the optical axis in the first parallax image data is greater than or equal to 50% of a pixel value of a peak pixel in the first parallax image data, and a pixel value of a center pixel corresponding to the optical axis in the second parallax image data is greater than or equal to 50% of a pixel value of a peak pixel in the second parallax image data.Type: ApplicationFiled: December 28, 2015Publication date: April 28, 2016Applicant: NIKON CORPORATIONInventors: Kiyoshige SHIBAZAKI, Muneki HAMASHIMA, Susumu MORI, Fumiki NAKAMURA, Mamoru IESAKA, Junya HAGIWARA, Kenichi ISHIGA
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Patent number: 8575532Abstract: A solid-state imaging device of the present invention is capable of thinning signals for each column. The solid-state imaging device includes: photo diodes, a drain into which charges transferred by first column CCDs are swept-off, and transfer control units each of which is provided to the corresponding first column CCDs, and transfers, to a row CCD and to the drain, the charges transferred by the corresponding first column CCDs. Each of the transfer control units includes: a second column CCD which transfers, in a column direction, the charges transferred by the first column CCDs corresponding to the transfer control unit, and a column CCD terminal gate which is provided between the second column CCD and the row CCD, and forms a potential barrier between the second column CCD and the row CCD.Type: GrantFiled: December 28, 2011Date of Patent: November 5, 2013Assignee: Panasonic CorporationInventors: Hiroshi Matsumoto, Mamoru Iesaka, Sei Suzuki, Katsuya Furukawa
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Publication number: 20120168608Abstract: A solid-state imaging device of the present invention is capable of thinning signals for each column. The solid-state imaging device includes: photo diodes, a drain into which charges transferred by first column CCDs are swept-off, and transfer control units each of which is provided to the corresponding first column CCDs, and transfers, to a row CCD and to the drain, the charges transferred by the corresponding first column CCDs. Each of the transfer control units includes: a second column CCD which transfers, in a column direction, the charges transferred by the first column CCDs corresponding to the transfer control unit, and a column CCD terminal gate which is provided between the second column CCD and the row CCD, and forms a potential barrier between the second column CCD and the row CCD.Type: ApplicationFiled: December 28, 2011Publication date: July 5, 2012Applicant: PANASONIC CORPORATIONInventors: Hiroshi MATSUMOTO, Mamoru IESAKA, Sei SUZUKI, Katsuya FURUKAWA
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Patent number: 8039915Abstract: A solid-state image sensor (1) includes: an imaging device wafer (2A); a plurality of imaging devices (3) which are formed on the imaging device wafer (2A); a spacer (5) which surrounds the imaging devices (3) on the imaging device wafer (2A) and is joined to the imaging device wafer (2A) with an adhesive (7); a transparent protection member (4) which covers the imaging devices (3) on the imaging device wafer (2A) and is attached on the spacer (5); and a plurality of electrostatic discharge protection devices (10A) which are formed on the imaging device wafer (2A), the electrostatic discharge protection devices (10A) being positioned under the spacer (5), each of the electrostatic discharge protection devices (10A) having diffusion layers (12, 13) and a well layer (11) between the diffusion layers (12, 13), the well layer (11) being provided with a channel stopper (20).Type: GrantFiled: September 27, 2007Date of Patent: October 18, 2011Assignee: FUJIFILM CorporationInventors: Kosuke Takasaki, Mamoru Iesaka, Hideki Wako
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Patent number: 7710478Abstract: A solid-state imaging device comprises, on a semiconductor substrate, a plurality of sensor sections for storing a signal charge commensurate with a quantity of reception light, a charge transfer section for transferring and outputting the signal charge of the sensor sections, and an output section for converting the signal charge transferred by the charge transfer section into an imaging signal for output. A current controller is provided to cut off or reduce a current flowing to the output section in a signal storage period of the sensor section. This cuts off or reduces the current flowing to the output section in a signal storage period of the sensor section, and hence suppresses the amount of the current flowing to the output section in the signal storage period. Thus, wasteful consumption power is greatly reduced.Type: GrantFiled: October 18, 2006Date of Patent: May 4, 2010Assignee: Sony CorporationInventor: Mamoru Iesaka
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Publication number: 20100060757Abstract: A solid-state image pickup device (1) comprises: an image sensor wafer (2A) including image sensors (3); an optically-transparent protection member (4) connected by use of an adhesive agent (7) via a spacer (5) arranged to surround the image sensors (3); and an electrostatic (ESD) protection circuit (10) disposed on the image sensor wafer (2A) so as to avoid a position corresponding to a connected surface where the spacer (5) and the image sensor wafer (2A) are connected. Accordingly, in this configuration, even when polarization occurs in the adhesive agent, since the p-well layer between diffusion layers of the ESD protection circuit is not disposed immediately below the connected surface, the p-well layer is not inverted by electric charges in the element interface and thus parasitic MOS transistor does not turn on, allowing suppression of leak current.Type: ApplicationFiled: December 10, 2007Publication date: March 11, 2010Applicant: FUJIFILM CorporationInventors: Kosuke Takasaki, Mamoru Iesaka, Hideki Wako
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Publication number: 20100032784Abstract: A solid-state image sensor (1) includes: an imaging device wafer (2A); a plurality of imaging devices (3) which are formed on the imaging device wafer (2A); a spacer (5) which surrounds the imaging devices (3) on the imaging device wafer (2A) and is joined to the imaging device wafer (2A) with an adhesive (7); a transparent protection member (4) which covers the imaging devices (3) on the imaging device wafer (2A) and is attached on the spacer (5); and a plurality of electrostatic discharge protection devices (10A) which are formed on the imaging device wafer (2A), the electrostatic discharge protection devices (10A) being positioned under the spacer (5), each of the electrostatic discharge protection devices (10A) having diffusion layers (12, 13) and a well layer (11) between the diffusion layers (12, 13), the well layer (11) being provided with a channel stopper (20).Type: ApplicationFiled: September 27, 2007Publication date: February 11, 2010Applicant: FUJIFILM CorporationInventors: Kosuke Takasaki, Mamoru Iesaka, Hideki Wako
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Publication number: 20090051799Abstract: An image pickup device includes: a plurality of photoelectric converting portions that are arranged at predetermined intervals in horizontal and vertical directions of an imaging region, and that generate signal charges corresponding to incident light; a vertical charge transfer portion that transfers the signal charges generated in the photoelectric converting portions, in the vertical direction for each column; two horizontal transfer portions that are extended in the horizontal direction, and that transfer the signal charges transferred from the vertical charge transfer portion, in the horizontal direction; and a connecting portion that is disposed on a line connecting the two horizontal transfer portions, and between the two horizontal transfer portions, accumulates the signal charges transferred from each of the two horizontal transfer portions, and transfers the signal charges to an output amplifier.Type: ApplicationFiled: August 12, 2008Publication date: February 26, 2009Inventor: Mamoru IESAKA
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Patent number: 7247830Abstract: An output amplifier for a solid-state imaging device is provided and includes: a floating diffusion that stores a signal charge; and at least three source follower circuits that output a signal in accordance with a change of a potential on the floating diffusion, the at least three source follower circuits being sequentially connected in decreasing order of drain voltage from a first circuit of the at least three source follower circuits to a last circuit of the at least three source follower circuits.Type: GrantFiled: June 1, 2006Date of Patent: July 24, 2007Assignee: Fujifilm CorporationInventor: Mamoru Iesaka
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Patent number: 7212241Abstract: A solid-state imaging device comprises, on a semiconductor substrate, a plurality of sensor sections for storing a signal charge commensurate with a quantity of reception light, a charge transfer section for transferring and outputting the signal charge of the sensor sections, and an output section for converting the signal charge transferred by the charge transfer section into an imaging signal for output. A current controller is provided to cut off or reduce a current flowing to the output section in a signal storage period of the sensor section. This cuts off or reduces the current flowing to the output section in a signal storage period of the sensor section, and hence suppresses the amount of the current flowing to the output section in the signal storage period. Thus, wasteful consumption power is greatly reduced.Type: GrantFiled: May 9, 2002Date of Patent: May 1, 2007Assignee: Sony CorporationInventor: Mamoru Iesaka
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Publication number: 20070081087Abstract: A solid-state imaging device comprises, on a semiconductor substrate, a plurality of sensor sections for storing a signal charge commensurate with a quantity of reception light, a charge transfer section for transferring and outputting the signal charge of the sensor sections, and an output section for converting the signal charge transferred by the charge transfer section into an imaging signal for output. A current controller is provided to cut off or reduce a current flowing to the output section in a signal storage period of the sensor section. This cuts off or reduces the current flowing to the output section in a signal storage period of the sensor section, and hence suppresses the amount of the current flowing to the output section in the signal storage period. Thus, wasteful consumption power is greatly reduced.Type: ApplicationFiled: October 18, 2006Publication date: April 12, 2007Inventor: Mamoru Iesaka
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Publication number: 20060278813Abstract: An output amplifier for a solid-state imaging device is provided and includes: a floating diffusion that stores a signal charge; and at least three source follower circuits that output a signal in accordance with a change of a potential on the floating diffusion, the at least three source follower circuits being sequentially connected in decreasing order of drain voltage from a first circuit of the at least three source follower circuits to a last circuit of the at least three source follower circuits.Type: ApplicationFiled: June 1, 2006Publication date: December 14, 2006Applicant: FUJI PHOTO FILM CO., LTD.Inventor: Mamoru Iesaka
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Publication number: 20030011698Abstract: A solid-state imaging device comprises, on a semiconductor substrate, a plurality of sensor sections for storing a signal charge commensurate with a quantity of reception light, a charge transfer section for transferring and outputting the signal charge of the sensor sections, and an output section for converting the signal charge transferred by the charge transfer section into an imaging signal for output. A current controller is provided to cut off or reduce a current flowing to the output section in a signal storage period of the sensor section. This cuts off or reduces the current flowing to the output section in a signal storage period of the sensor section, and hence suppresses the amount of the current flowing to the output section in the signal storage period. Thus, wasteful consumption power is greatly reduced.Type: ApplicationFiled: May 9, 2002Publication date: January 16, 2003Inventor: Mamoru Iesaka
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Patent number: 5796432Abstract: A solid state imaging device and method of operating the same includes an imaging section for converting incident light into a signal charge which is temporarily stored in a storage section before being read out. A vertical transfer register extends from an imaging section to a storage section. A transfer clock pulse is applied to a portion of the vertical transfer register disposed in the storage section such that the potential of the vertical transfer register in the storage section is deeper than that in the imaging section. Excess charge is transferred to a smear drain section. According to an alternate feature, the potential of the vertical transfer register within either the imaging section or the storage section is maintained constant. A further feature makes use of two drain regions disposed at respective distal ends of the imaging section and the storage section.Type: GrantFiled: January 23, 1996Date of Patent: August 18, 1998Assignee: Sony CorporationInventors: Mamoru Iesaka, Tetsuro Kumesawa
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Patent number: 4987466Abstract: A solid state image sensor includes a plurality of charge storage elements arranged in a matrix form on a semiconductor substrate, vertical CCDs arranged in a plurality of columns along the arrangement of the charge storage elements on the semiconductor substrate, for reading out signal charges stored in the charge storage elements, and a plurality of horizontal CCDs arranged in parallel on the substrate and extending in a direction perpendicular to the vertical CCDs, for individually transferring signal charges of each row supplied from the vertical CCDs in a horizontal direction. A channel through which the signal charge passes at the time of transfer of the signal charge between the horizontal CCDs is made wider on the signal charge output port side than on the signal charge input port side.Type: GrantFiled: June 7, 1989Date of Patent: January 22, 1991Assignee: Kabushiki Kaisha ToshibaInventors: Hidenori Shibata, Mamoru Iesaka, Shinji Oosawa
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Patent number: 4949143Abstract: The semiconductor devices include a semiconductor substrate, a first CCD region formed at the surface of said substrate, and a second CCD region having a side connected to said first CCD. A channel region of the first CCD region has a different channel potential at a latter part of the end transfer electrode corresponding to the portion of the first CCD region connected to the second CCD region.Type: GrantFiled: January 11, 1989Date of Patent: August 14, 1990Assignee: Kabushiki Kaisha ToshibaInventors: Mamoru Iesaka, Shinji Uya, Nozomu Harada
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Patent number: 4807037Abstract: In a CCD image sensor, a plurality of horizontal CCD registers are disposed adjacent to an image sensing area having matrix-arrayed image sensing cells and a plurality of vertical CCD registers. In the CCD image sensor, the channel impurity concentration of second horizontal CCD register, located away from the image sensing area, is more higher than that of first horizontal CCD register. With this feature, when the charges are transferred to the second horizontal CCD register across the first horizontal register, the residual charges in the first horiozntal CCD register are remarkably reduced.Type: GrantFiled: November 6, 1987Date of Patent: February 21, 1989Assignee: Kabushiki Kaisha ToshibaInventors: Mamoru Iesaka, Yoshiyuki Matsunaga, Sohei Manabe, Nozomu Harada