Patents by Inventor Mamoru Ishizaki
Mamoru Ishizaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160013213Abstract: A thin film transistor array including a gate wiring connected to a gate electrode and extended in a first direction, a source wiring connected to a source electrode, a drain electrode having a gap from the source electrode, a semiconductor pattern formed at least in a portion corresponding to the gap between the source and drain electrodes, the semiconductor pattern having a region defined by extending the portion in a second direction perpendicular to the first direction, and a pixel electrode that overlaps with a capacitor electrode in the planar view. In the planar view, the drain electrode has a shape of a single line, the source electrode has a first portion in a line shape and a second portion in a sheath shape surrounding the drain electrode and keeping a space from the drain electrode, and the source wiring is narrower than the region of the semiconductor pattern.Type: ApplicationFiled: September 22, 2015Publication date: January 14, 2016Applicant: Toppan Printing Co., Ltd.Inventor: Mamoru ISHIZAKI
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Publication number: 20150221685Abstract: A layered structure includes a first electrode layer on an insulating substrate, a first insulating film on the first electrode layer, a second electrode layer on the first insulating film, a second insulating film on the second electrode layer, and a third electrode layer on the second insulating film. The first electrode layer, an opening of the first insulating film, the second electrode layer, an opening of the second insulating film, and the third electrode layer have a stack structure that causes the first electrode layer and the second electrode layer to be connected. The third electrode layer relays or reinforces, through the opening of the second insulating film, a connection between the first electrode layer and the second electrode layer formed on the first insulating film.Type: ApplicationFiled: March 20, 2015Publication date: August 6, 2015Inventors: Mamoru ISHIZAKI, Kaoru Hatta
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Patent number: 8742423Abstract: In a thin-film transistor array according to an embodiment of the present invention, thin-film transistors are disposed in a matrix array, the thin-film transistor including a gate electrode that is formed on a substrate, a gate insulating layer that is formed on the gate electrode, a source electrode that is formed on the gate insulating layer, a pixel electrode that is formed on the gate insulating layer, a drain electrode that is connected to the pixel electrode, and a semiconductor layer that is formed between the source electrode and the drain electrode, the gate electrode is connected to a gate line while the source electrode is connected to a source line, the thin-film transistor is formed within a region of the source line and the thin-film transistor array includes a stripe insulating film such that the source line and the semiconductor layer are covered with the stripe insulating film.Type: GrantFiled: September 14, 2011Date of Patent: June 3, 2014Assignee: Toppan Printing Co., Ltd.Inventors: Ryohei Matsubara, Mamoru Ishizaki
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Patent number: 8502228Abstract: One embodiment of the present invention is a thin film transistor array, having an insulating substrate and a stripe-shaped semiconductor layer for a plurality of transistors, the layer extending over the plurality of transistors. Another embodiment of the present invention is an active matrix type display, having the thin film transistor array of the one embodiment and an image display means.Type: GrantFiled: December 29, 2011Date of Patent: August 6, 2013Assignee: Toppan Printing Co., Ltd.Inventors: Ryohei Matsubara, Mamoru Ishizaki
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Patent number: 8309952Abstract: One embodiment of the present invention is a thin film transistor, including: an insulating substrate; a gate electrode and a gate insulator being formed on the insulating substrate, in this order; a source electrode and a drain electrode formed on the gate insulator, surface preparation of the source electrode and the drain electrode being performed with a compound having a functional group with an electron-withdrawing property; and a semiconductor film formed on the gate insulator, the film being formed between the source electrode and the drain electrode.Type: GrantFiled: February 21, 2008Date of Patent: November 13, 2012Assignee: Toppan Printing Co., Ltd.Inventors: Ryohei Matsubara, Mamoru Ishizaki
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Publication number: 20120097959Abstract: One embodiment of the present invention is a thin film transistor array, having an insulating substrate and a stripe-shaped semiconductor layer for a plurality of transistors, the layer extending over the plurality of transistors. Another embodiment of the present invention is an active matrix type display, having the thin film transistor array of the one embodiment and an image display means.Type: ApplicationFiled: December 29, 2011Publication date: April 26, 2012Applicant: Toppan Printing Co., Ltd.Inventors: Ryohei Matsubara, Mamoru Ishizaki
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Patent number: 8110858Abstract: One embodiment of the present invention is a thin film transistor array, having an insulating substrate and a stripe-shaped semiconductor layer for a plurality of transistors, the layer extending over the plurality of transistors. Another embodiment of the present invention is an active matrix type display, having the thin film transistor array of the one embodiment and an image display means.Type: GrantFiled: February 8, 2008Date of Patent: February 7, 2012Assignee: Toppan Printing Co., Ltd.Inventors: Ryohei Matsubara, Mamoru Ishizaki
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Patent number: 8098006Abstract: One embodiment of the present invention is a color EL display characterized in that at least color filters, a thin film transistor circuit, an organic EL layer, and a common electrode are laminated in this order on a transparent substrate. Another embodiment of the invention is a method for producing a color EL display comprising the steps of forming color filters on a transparent substrate; forming a thin film transistor circuit; forming an organic EL layer; and forming a common electrode, wherein a process temperatures of the steps of forming the thin film transistor circuit and subsequent steps are 200° C. or less.Type: GrantFiled: December 3, 2007Date of Patent: January 17, 2012Assignee: Toppan Printing Co., Ltd.Inventors: Mamoru Ishizaki, Norimasa Sekine, Manabu Ito, Eiichi Kitazume
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Publication number: 20120001189Abstract: In a thin-film transistor array according to an embodiment of the present invention, thin-film transistors are disposed in a matrix array, the thin-film transistor including a gate electrode that is formed on a substrate, a gate insulating layer that is formed on the gate electrode, a source electrode that is formed on the gate insulating layer, a pixel electrode that is formed on the gate insulating layer, a drain electrode that is connected to the pixel electrode, and a semiconductor layer that is formed between the source electrode and the drain electrode, the gate electrode is connected to a gate line while the source electrode is connected to a source line, the thin-film transistor is formed in a range of the source line and the thin-film transistor array includes a stripe insulating film such that the source line and the semiconductor layer are covered with the stripe insulating film.Type: ApplicationFiled: September 14, 2011Publication date: January 5, 2012Applicant: Toppan Printing Co., Ltd.Inventors: Ryohei Matsubara, Mamoru Ishizaki
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Patent number: 7884368Abstract: One embodiment of the present invention is a thin film transistor having a gate electrode formed on an insulating substrate, a gate wire connected to the gate electrode, a capacitor electrode, a capacitor wire connected to the capacitor electrode, a gate insulator formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulator, a sealing layer formed on the oxide semiconductor pattern, a drain electrode and a source electrode formed on the sealing layer, a drain wire connected to the drain electrode and a pixel electrode connected to the source electrode, the drain wire and the pixel electrode being in the same layer as the drain electrode and the source electrode.Type: GrantFiled: July 9, 2010Date of Patent: February 8, 2011Assignee: Toppan Printing Co., Ltd.Inventors: Mamoru Ishizaki, Manabu Ito, Masato Kon, Osamu Kina, Ryohei Matsubara
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Publication number: 20100276692Abstract: One embodiment of the present invention is a thin film transistor having a gate electrode formed on an insulating substrate, a gate wire connected to the gate electrode, a capacitor electrode, a capacitor wire connected to the capacitor electrode, a gate insulator formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulator, a sealing layer formed on the oxide semiconductor pattern, a drain electrode and a source electrode formed on the sealing layer, a drain wire connected to the drain electrode and a pixel electrode connected to the source electrode, the drain wire and the pixel electrode being in the same layer as the drain electrode and the source electrode.Type: ApplicationFiled: July 9, 2010Publication date: November 4, 2010Applicant: Toppan Printing Co., Ltd.Inventors: Mamoru Ishizaki, Manabu Ito, Masato Kon, Osamu Kina, Ryohei Matsubara
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Patent number: 7795613Abstract: A structure with a transistor is disclosed comprising a substrate, a gas barrier layer on the substrate, and a transistor on the gas barrier layer. The transistor can include an oxide semiconductor layer. The oxide semiconductor layers can comprise In—Ga—Zn—O. A display, such as a liquid crystal display, can have such a structure.Type: GrantFiled: April 17, 2007Date of Patent: September 14, 2010Assignee: Toppan Printing Co., Ltd.Inventors: Manabu Ito, Masato Kon, Mamoru Ishizaki, Norimasa Sekine
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Patent number: 7768008Abstract: One embodiment of the present invention is a thin film transistor including a gate electrode formed on an insulating substrate, a gate insulator formed on the gate electrode, a drain electrode and a source electrode formed on the gate insulator, an oxide semiconductor pattern formed between the drain electrode and the source electrode, and a sealing layer formed on the oxide semiconductor pattern.Type: GrantFiled: November 13, 2007Date of Patent: August 3, 2010Assignee: Toppan Printing Co., Ltd.Inventors: Mamoru Ishizaki, Manabu Ito, Masato Kon, Osamu Kina, Ryohei Matsubara
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Publication number: 20090121225Abstract: One embodiment of the present invention is a thin film transistor including a gate electrode formed on an insulating substrate, a gate insulator formed on the gate electrode, a drain electrode and a source electrode formed on the gate insulator, an oxide semiconductor pattern formed between the drain electrode and the source electrode, and a sealing layer formed on the oxide semiconductor pattern.Type: ApplicationFiled: November 13, 2007Publication date: May 14, 2009Applicant: Toppan Printing Co., Ltd.Inventors: Mamoru Ishizaki, Manabu Ito, Masato Kon, Osamu Kina, Ryohei Matsubara
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Publication number: 20090057656Abstract: One embodiment of the present invention is a thin film transistor, including: an insulating substrate; a gate electrode and a gate insulator being formed on the insulating substrate, in this order; a source electrode and a drain electrode formed on the gate insulator, surface preparation of the source electrode and the drain electrode being performed with a compound having a functional group with an electron-withdrawing property; and a semiconductor film formed on the gate insulator, the film being formed between the source electrode and the drain electrode.Type: ApplicationFiled: February 21, 2008Publication date: March 5, 2009Applicant: Toppan Printing Co., Ltd.Inventors: Ryohei Matsubara, Mamoru Ishizaki
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Publication number: 20080197348Abstract: One embodiment of the present invention is a thin film transistor array, having an insulating substrate and a stripe-shaped semiconductor layer for a plurality of transistors, the layer extending over the plurality of transistors. Another embodiment of the present invention is an active matrix type display, having the thin film transistor array of the one embodiment and an image display means.Type: ApplicationFiled: February 8, 2008Publication date: August 21, 2008Applicant: Toppan Printing Co., Ltd.Inventors: Ryohei Matsubara, Mamoru Ishizaki
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Publication number: 20080129195Abstract: One embodiment of the present invention is a color EL display characterized in that at least color filters, a thin film transistor circuit, an organic EL layer, and a common electrode are laminated in this order on a transparent substrate. Another embodiment of the invention is a method for producing a color EL display comprising the steps of forming color filters or a transparent substrate; forming a thin film transistor circuit; forming an organic EL layer; and forming a common electrode, wherein process temperatures of the steps of forming the thin film transistor circuit and subsequent steps are 200° C. or less.Type: ApplicationFiled: December 3, 2007Publication date: June 5, 2008Applicant: Toppan Printing Co., Ltd.Inventors: Mamoru Ishizaki, Norimasa Sekine, Manabu Ito, Eiichi Kitazume
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Publication number: 20070252928Abstract: A method of manufacturing a transmission type liquid crystal display is disclosed including preparing a color filter; forming a substantially transparent semiconductor circuit on a surface of the color filter while position adjustment between the color filter and the semiconductor circuit is performed; and forming a transmission type liquid crystal display element on one side of the substantially transparent semiconductor circuit, wherein there is no color filter on the one side.Type: ApplicationFiled: April 11, 2007Publication date: November 1, 2007Applicant: Toppan Printing Co., Ltd.Inventors: Manabu Ito, Norimasa Sekine, Mamoru Ishizaki, Osamu Kina, Ryohei Matsubara
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Patent number: 7289713Abstract: Some of the embodiments of this invention provide optical waveguides which achieve high use efficiency of core material and which are inexpensive. Some other embodiments of the invention provide methods of manufacturing such optical waveguides. An method of manufacturing an optical waveguide, according to the invention, comprises a step of forming a first clad by applying a resin on a substrate and curing the resin, a step of applying a core material between a recessed mold which has a recess having a shape identical to a shape of the core, and the first clad which is provided on the substrate, a step of curing the core material thus applied, thereby forming a core pattern having a shape corresponding to that of the recess, and a step of peeling the recessed mold from the core pattern and the first clad.Type: GrantFiled: March 22, 2006Date of Patent: October 30, 2007Assignee: Toppan Printing Co., Ltd.Inventors: Mamoru Ishizaki, Hatsune Hara, Jun Sasaki, Shinichi Inoue, Takehito Tsukamoto
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Publication number: 20060177188Abstract: Some of the embodiments of this invention provide optical waveguides which achieve high use efficiency of core material and which are inexpensive. Some other embodiments of the invention provide methods of manufacturing such optical waveguides. An method of manufacturing an optical waveguide, according to the invention, comprises a step of forming a first clad by applying a resin on a substrate and curing the resin, a step of applying a core material between a recessed mold which has a recess having a shape identical to a shape of the core, and the first clad which is provided on the substrate, a step of curing the core material thus applied, thereby forming a core pattern having a shape corresponding to that of the recess, and a step of peeling the recessed mold from the core pattern and the first clad.Type: ApplicationFiled: March 22, 2006Publication date: August 10, 2006Applicant: TOPPAN PRINTING CO., LTD.Inventors: Mamoru Ishizaki, Hatsune Hara, Jun Sasaki, Shinichi Inoue, Takehito Tsukamoto