Abstract: An off-leak current cancel circuit includes an input terminal, an input protection circuit, a current cancel circuit and a current providing circuit. The input protection circuit has a first protection transistor connected between the input terminal and a high power supply potential source, and a second protection transistor connected between the input terminal and a low power supply potential source. The first protection transistor flows a first off-leak current. The second protection transistor flows a second off-leak current. The current cancel circuit has a first monitor transistor for flowing a third off-leak current that is a first times smaller than the first off-leak current, and a cancellation circuit for flowing the first off-leak current to the low power supply potential source in response to the third off-leak current.

Abstract: A cable and cable system is provided having a conductor and an insulation layer on an outer circumference of a conductor. The insulation layer is impregnated with a medium-viscosity insulating oil that has a viscosity of 10 centistokes (cst) to less than 500 cst at 60° C. The insulation layer includes an insulating tape that may be one or a combination of composite tape having a polyolefin resin film laminated with a kraft paper on both its sides and an insulating tape including a polyolefin resin film. The cable includes a metal sheath provided on an outer circumference of the insulation layer, and a reinforcing layer formed on an outer circumference of the metal sheath. The reinforcing layer reinforces the metal sheath by absorbing hoop stress exerted on the metal sheath. The cable system includes a submarine-portion cable and a land-portion cable, an oil stop joint box, and an oil feeding tank.

Abstract: A solid cable provided with an insulation layer on the outer circumference of a conductor, and impregnated with insulating oil in this insulation layer. Medium-viscosity insulating oil the viscosity of which is between not less than 10 cst and less than 500 cst at 60° C. is used as the insulating oil.

Abstract: An object of the present invention is to provide a DRAM of a special form, a non-volatile memory cell incorporating the DRAM, and a semiconductor device which incorporates a DRAM structure and a non-volatile memory cell and where data can be written and erased with high accuracy. The semiconductor memory device has a sub bit line BLs1 to which the main bit line BL1 is connected via a selector transistor Tr1, and non-volatile memory cells M1-Nn, i.e., memory transistors whose drain electrodes are connected to the sub bit line Bls1. An a-c pulse generator applies an a-c voltage to the control gates of the non-volatile memory cells M1-Nn. The DRAM cell is formed of a capacitor element formed of parasitic capacitance of the sub bit line BLs1 and the drain electrodes of the non-volatile memory cells connected to the bit line BLs1.