Patents by Inventor Mamoru Maekawa

Mamoru Maekawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6601295
    Abstract: Chip-type electronic devices are produced by providing a base board which is later to be cut into rectangular substrates, forming longitudinally and transversely aligned throughholes through the base board, forming electrode patterns on the base board, attaching semiconductor elements on the electrode patterns, filling the throughholes with a solder material, heating and cooling to solidify the solder material such that it shrinks to an intermediate height below the top surface of the base board, covering the top surface completely with a resin mold and then cutting the base board into the individual substrates. Each device thus produced has a substrate with a vertically extending groove formed on each of its mutually opposite edges. A solder material fills these grooves partially to a height which is below the top surface of the substrate. Electrode patterns are formed on these edges of the substrate including the inner surfaces of these grooves.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: August 5, 2003
    Inventor: Mamoru Maekawa
  • Publication number: 20010022021
    Abstract: A chip-type electronic device has a substrate with a vertically extending groove formed on each of its mutually opposite edges. A solder material fills these grooves partially to a height which is below the top surface of the substrate. Electrode patterns are formed on these edges of the substrate including the inner surfaces of these grooves. A semiconductor electronic element is attached onto the top surface of the substrate. A resin mold seals the entire top surface of the substrate inclusive of the semiconductor element, extending to positions of the edges of the substrate and protruding partially into the grooves so as to serve as hooks to securely attach to the substrate.
    Type: Application
    Filed: May 16, 2001
    Publication date: September 20, 2001
    Inventor: Mamoru Maekawa
  • Patent number: 6281435
    Abstract: A chip-type electronic device has a substrate with a vertically extending groove formed on each of its mutually opposite edges. A solder material fills these grooves partially to a height which is below the top surface of the substrate. Electrode patterns are formed on these edges of the substrate including the inner surfaces of these grooves. A semiconductor electronic element is attached onto the top surface of the substrate. A resin mold seals the entire top surface of the substrate inclusive of the semiconductor element, extending to positions of the edges of the substrate and protruding partially into the grooves so as to serve as hooks to securely attach to the substrate.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: August 28, 2001
    Assignee: Rohm Co., Ltd.
    Inventor: Mamoru Maekawa
  • Patent number: 4721944
    Abstract: An A/D conversion method including the steps of storing digital voltage values obtained through an A/D conversion of divided voltages obtained by dividing an analog voltage in a predetermined voltage range into a predetermined number of different dividing ratios by an A/D converter and digital data for calculating digital output data for the A/D conversion of an input voltage in combination with the digital voltage values in a memory, converting the input voltage into a corresponding digital input value through A/D conversion, deciding upon a voltage division including the digital input value among divisions demarcated by the digital voltage values by sequentially comparing the digital voltage values with the digital input value, deciding which of a pair of the digital voltage values demarcating the division selected through the prior decision is the approximate value of the digital input value, updating the divided voltage corresponding to the digital voltage value through A/D conversion to provide a represe
    Type: Grant
    Filed: July 21, 1986
    Date of Patent: January 26, 1988
    Assignee: Yamatake-Honeywell Co. Ltd.
    Inventors: Masumi Kiikuniya, Mamoru Maekawa, Shinichi Mori