Patents by Inventor Mamoru Ogihara

Mamoru Ogihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7999671
    Abstract: A radio communication apparatus has a GPS function, is internally included in or is removably connected to an information processing apparatus. A reference position setting unit sets a reference position. A positional condition setting unit sets a positional condition about the reference position which is a condition for performing the processing under a predetermined security mode. A positional condition determining unit determines whether the condition for performing the processing under a predetermined security mode is obtained or not on the basis of the positional condition and its positional information obtained by the GPS function. A security mode processing performing unit performs processing under a predetermined security mode if it is determined that the condition for performing the processing under a predetermined security mode is obtained.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: August 16, 2011
    Assignee: Hitachi Kokusai Electric Inc.
    Inventor: Mamoru Ogihara
  • Publication number: 20090243926
    Abstract: A radio communication apparatus has a GPS function, is internally included in or is removably connected to an information processing apparatus and operates with the power supplied from the information processing apparatus. Charging means charges the power supplied from the information processing apparatus. Reference position setting means sets a reference position. Positional condition setting means sets a positional condition about the reference position which is a condition for performing the processing under a predetermined security mode. Positional condition determining means determines whether the condition for performing the processing under a predetermined security mode is obtained or not on the basis of the positional condition and its positional information obtained by the GPS function. Security mode processing performing means performs processing under a predetermined security mode if it is determined that the condition for performing the processing under a predetermined security mode is obtained.
    Type: Application
    Filed: March 3, 2009
    Publication date: October 1, 2009
    Inventor: Mamoru Ogihara
  • Patent number: 6628010
    Abstract: A parallel power system is provided which can flexibly change output currents and the number of channels in short time and at low cost. A back board 7 of the parallel power system has connectors ECC and DCC for plug-in mounting power source circuits 1 to 6 and an electronic circuit 8. Terminals of the connectors DCC and EDC are connected by wiring lines HP. The power source circuits 1 to 3 constitute a first voltage channel by a power source line DH1 and a parallel operation control line PCH1 of the electronic circuit 8, whereas the power source circuits 4 to 6 constitute a second voltage channel by a power source line DH2 and a parallel operation control line PCH2. When a specification of the electronic circuit is to be changed, only the power source lines DH1 and DH2 and parallel operation control lines PCH1 and PCH2 are changed without changing the back board 7 and the like.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: September 30, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Hideho Yamamura, Mamoru Ogihara, Naoki Maru
  • Publication number: 20020089865
    Abstract: A parallel power system is provided which can flexibly change output currents and the number of channels in short time and at low cost. A back board 7 of the parallel power system has connectors ECC and DCC for plug-in mounting power source circuits 1 to 6 and an electronic circuit 8. Terminals of the connectors DCC and EDC are connected by wiring lines HP. The power source circuits 1 to 3 constitute a first voltage channel by a power source line DH1 and a parallel operation control line PCH1 of the electronic circuit 8, whereas the power source circuits 4 to 6 constitute a second voltage channel by a power source line DH2 and a parallel operation control line PCH2. When a specification of the electronic circuit is to be changed, only the power source lines DH1 and DH2 and parallel operation control lines PCH1 and PCH2 are changed without changing the back board 7 and the like.
    Type: Application
    Filed: December 20, 2001
    Publication date: July 11, 2002
    Inventors: Hideho Yamamura, Mamoru Ogihara, Naoki Maru
  • Patent number: 5958600
    Abstract: Disclosed are a highly reliable circuit board and a method of stably manufacturing the circuit board, wherein an insulator made from a specific organic insulating material is provided under a highly stressed conductor for preventing occurrence of cracks in the insulator. In addition, a method of correcting a wiring of a ceramic board is additionally adopted. The circuit board includes a thick film wiring board 1 having a first conductor pattern 2 and a thin film layer laminated on the first conductor pattern 2.
    Type: Grant
    Filed: January 9, 1998
    Date of Patent: September 28, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Sotokawa, Akira Yabushita, Takashi Inoue, Hidetaka Shigi, Mamoru Ogihara, Haruhiko Matsuyama, Minoru Tanaka, Yasunori Narizuka
  • Patent number: 5868949
    Abstract: A metalization structure having a first conductor layer on the surface of an underlying layer and, further, a second conductor layer connected conductively with the first conductor layer in which a polyimide insulative film of low thermal expansion coefficient is present between at least an end of a pattern of the second conductor layer and the first conductor layer, for stably obtaining a metalization structure of high reliability and free from the worry of peeling of the conductor portion from a substrate or occurrence of cracking to the underlying layer.
    Type: Grant
    Filed: November 14, 1995
    Date of Patent: February 9, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Sotokawa, Masashi Nishiki, Eiji Matsuzaki, Hidetaka Shigi, Toshio Terouchi, Mamoru Ogihara, Haruhiko Matsuyama, Minoru Tanaka