Patents by Inventor Mamoru Sato

Mamoru Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230192890
    Abstract: Provided are anti-PAD4 antibodies having excellent properties and an excellent method for treatment of RA. Used are anti-PAD4 antibodies that specifically bind to an epitope containing positions 345, 347, and 348 of PAD4. These anti-PAD4 antibodies may inhibit the citrullination activity of PAD4. In addition, these anti-PAD4 antibodies may have a KD (M) of 9.0×10?9 or less. Optionally, the anti-PAD4 antibody and a TNF? inhibitor are used in combination.
    Type: Application
    Filed: September 19, 2022
    Publication date: June 22, 2023
    Inventors: Mamoru SATO, Michiyuki YAMADA, Satoshi KANAZAWA, Masayoshi TOYOURA, Yuji SHOYA, Kenji SAITO, Chihiro YAMAZAKI
  • Publication number: 20230041457
    Abstract: To improve the image quality of image data in a solid-state imaging device that reads a signal according to a potential difference between respective floating diffusion regions of a pair of pixels. A pixel unit is provided with a plurality of rows each including a plurality of pixels. A readout row selection unit selects any of the plurality of rows as a readout row every time a predetermined period elapses, and causes each of the plurality of pixels in the readout row to generate a signal potential according to a received light amount. A reference row selection unit selects a row different from a previous row from among the plurality of rows as a current reference row every time the predetermined period elapses, and causes each of the plurality of pixels in the reference row to generate a predetermined reference potential. A readout circuit unit reads a voltage signal according to a difference between the signal potential and the reference potential.
    Type: Application
    Filed: October 24, 2022
    Publication date: February 9, 2023
    Inventors: Mamoru Sato, Akihiko Kato, Yusuke Oike
  • Publication number: 20230031389
    Abstract: There is provided an imaging device, comprising differential amplifier circuitry comprising a first amplification transistor and a second amplification transistor; and a plurality of pixels including a first pixel and a second pixel, wherein the first pixel includes a first photoelectric converter, a first reset transistor, and the first amplification transistor, and wherein the second pixel includes a second photoelectric converter, a second reset transistor, and the second amplification transistor, wherein the first reset transistor is coupled to a first reset voltage, and wherein the second reset transistor is coupled to a second reset voltage different than the first reset voltage.
    Type: Application
    Filed: October 3, 2022
    Publication date: February 2, 2023
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: Yusuke Oike, Mamoru Sato, Yukio Tagawa
  • Patent number: 11553148
    Abstract: To improve the image quality of image data in a solid-state imaging device that reads a signal according to a potential difference between respective floating diffusion regions of a pair of pixels. A pixel unit is provided with a plurality of rows each including a plurality of pixels. A readout row selection unit selects any of the plurality of rows as a readout row every time a predetermined period elapses, and causes each of the plurality of pixels in the readout row to generate a signal potential according to a received light amount. A reference row selection unit selects a row different from a previous row from among the plurality of rows as a current reference row every time the predetermined period elapses, and causes each of the plurality of pixels in the reference row to generate a predetermined reference potential. A readout circuit unit reads a voltage signal according to a difference between the signal potential and the reference potential.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: January 10, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Mamoru Sato, Akihiko Kato, Yusuke Oike
  • Publication number: 20220417461
    Abstract: A selection pixel where signal readout is performed and a reference pixel where signal readout is not performed are arranged in a pixel array section, and an amplification transistor of the selection pixel and an amplification transistor of the reference pixel each source electrode of which is connected in common to a common wire are connected with a constant current source via the common wire to form a differential amplification circuit. Then, a bypass control section which selectively establishes connection between the constant current source and a differential output node of the differential amplification circuit and limits a voltage of the differential output node to a predetermined voltage by causing a bypass current to flow between the constant current source and the differential output node, and a current path for bypass current that supplies the bypass current to the constant current source through the pixel array section are included.
    Type: Application
    Filed: October 28, 2020
    Publication date: December 29, 2022
    Inventors: ERIKO KATO, MAMORU SATO
  • Patent number: 11516417
    Abstract: There is provided an imaging device, comprising differential amplifier circuitry comprising a first amplification transistor and a second amplification transistor; and a plurality of pixels including a first pixel and a second pixel, wherein the first pixel includes a first photoelectric converter, a first reset transistor, and the first amplification transistor, and wherein the second pixel includes a second photoelectric converter, a second reset transistor, and the second amplification transistor, wherein the first reset transistor is coupled to a first reset voltage, and wherein the second reset transistor is coupled to a second reset voltage different than the first reset voltage.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: November 29, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yusuke Oike, Mamoru Sato, Yukio Tagawa
  • Patent number: 11503240
    Abstract: Provided is a solid-state image pickup element that amplifies the difference between respective signals of a pair of pixels and enables a reduction in the number of wiring lines. The solid-state image pickup element includes an electric-charge accumulation unit, a reference reset transistor, and a readout reset transistor. The electric-charge accumulation unit accumulates electric charge transferred from a photoelectric conversion unit and generates signal voltage corresponding to the amount of the electric charge. The reference reset transistor supplies predetermined reset voltage to the electric-charge accumulation unit in a case of generating predetermined reference voltage. The readout reset transistor supplies voltage different from the reset voltage to the electric-charge accumulation unit in a case of reading out the signal voltage.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: November 15, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Mamoru Sato
  • Patent number: 11447569
    Abstract: Provided are anti-PAD4 antibodies having excellent properties and an excellent method for treatment of RA. Used are anti-PAD4 antibodies that specifically bind to an epitope containing positions 345, 347, and 348 of PAD4. These anti-PAD4 antibodies may inhibit the citrullination activity of PAD4. In addition, these anti-PAD4 antibodies may have a KD (M) of 9.0×10?9 or less. Optionally, the anti-PAD4 antibody and a TNF? inhibitor are used in combination.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: September 20, 2022
    Assignees: PUBLIC UNIVERSITY CORPORATION YOKOHAMA CITY UNIVERSITY, PUBLIC UNIVERSITY CORPORATION NAGOYA CITY UNIVERSITY, PHARMA FOODS INTERNATIONAL CO., LTD.
    Inventors: Mamoru Sato, Michiyuki Yamada, Satoshi Kanazawa, Masayoshi Toyoura, Yuji Shoya, Kenji Saito, Chihiro Yamazaki
  • Patent number: 11451725
    Abstract: To widen a dynamic range without reducing a frame rate in a solid-state imaging element provided with a differential amplifier circuit. The solid-state imaging element includes a reading circuit and a processing unit. The reading circuit performs processing of outputting a differentially amplified signal obtained by amplifying a difference between generated voltages of a pair of pixels and processing of outputting a pixel signal of the generated voltage of at least one of the pair of pixels each time the pair of pixels are exposed. The processing unit performs synthesis processing of synthesizing the output differentially amplified signal and the output pixel signal.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: September 20, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Mamoru Sato
  • Patent number: 11438543
    Abstract: A solid-state imaging device is disclosed. In one example, a solid-state imaging device includes a current mirror circuit connected to first and second vertical signal lines, first and second unit pixels connected to the first or the second vertical signal line, a current supply line connected to the first and the second unit pixels, and a constant current circuit connected to the current supply line. The unit pixels each include a photoelectric conversion element, a transfer transistor that transfers an electric charge generated in the photoelectric conversion element, first and second charge accumulation units that accumulate the transferred electric charge, a switching transistor configured to control accumulation of the electric charge by the second charge accumulation unit, and an amplification transistor that causes a voltage corresponding to electric charges accumulated the first and/or the second charge accumulation units to appear in the first or the second vertical signal line.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: September 6, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Mamoru Sato, Akihiko Kato
  • Publication number: 20220141411
    Abstract: To improve charge transfer efficiency in a solid-state imaging device that transfers a charge from a photoelectric conversion element to a floating diffusion layer. A solid-state imaging device is provided with a transfer transistor and a potential control unit. In this solid-state imaging device, the transfer transistor transfers a charge from a photoelectric conversion element to a floating diffusion layer in a predetermined transfer period according to a transfer signal transmitted through a predetermined transfer line. Furthermore, the potential control unit makes a potential in a transfer period of a predetermined signal line capacitively coupled with the floating diffusion layer higher than that outside the transfer period.
    Type: Application
    Filed: November 28, 2019
    Publication date: May 5, 2022
    Inventors: MAMORU SATO, AKIHIKO KATO, YUSUKE OIKE, HIDEHIRO HARATA, HIDEKI NAGANUMA
  • Patent number: 11297274
    Abstract: To suppress deterioration of image quality. A solid-state imaging device (1) according to an embodiment includes a first vertical signal line (VSL0k) and a second vertical signal line (VSL1k), a current mirror circuit (141) connected to the first and the second vertical signal lines, a first unit pixel (11i) connected to the first vertical signal line, a second unit pixel (11i+1) connected to the second vertical signal line, a first unit cell (11D0) connected to the first vertical signal line, a second unit cell (11D1) connected to the second vertical signal line, a current supply line (VCOM) connected to the first and the second unit pixels and the first and the second unit cells, and a constant current circuit (142) connected to the current supply line.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: April 5, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Mamoru Sato
  • Publication number: 20220060646
    Abstract: A light detecting device includes: one or more switch transistors, a first pixel including a first floating diffusion region coupled to a first photoelectric converter through a first transfer transistor, and a first amplification transistor coupled to the first floating diffusion region, a second pixel including a second floating diffusion region coupled to a second photoelectric converter through a second transfer transistor, and a second amplification transistor coupled to the second floating diffusion region, and a third pixel including a third floating diffusion region coupled to a third photoelectric converter through a third transfer transistor, and a third amplification transistor coupled to the third floating diffusion region. A pixel signal is differentially amplified by the first and third amplification transistors. The first and second floating diffusion regions are selectively connected to each other via one of the one or more switch transistors.
    Type: Application
    Filed: February 28, 2020
    Publication date: February 24, 2022
    Inventors: Mamoru Sato, Akihiko Kato, Eriko Kato
  • Patent number: 11252367
    Abstract: To increase a readout speed of a pixel signal in a non-differential mode in a solid-state image sensor that performs differential amplification in a differential mode and does not perform differential amplification in the non-differential mode. A connection control unit sequentially performs control of connecting a first pixel connected to a first signal line to a reset power supply via a third signal line and control of connecting a second pixel connected to a second signal line to the reset power supply via a fourth signal line in a differential mode, and performs control of connecting a third pixel to the third signal line and control of connecting the fourth pixel to the fourth signal line in a non-differential mode.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: February 15, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yukio Tagawa, Mamoru Sato
  • Patent number: 11228726
    Abstract: An imaging device includes a plurality of pixels including a first pixel and a second pixel, and a differential amplifier including a first amplification transistor, a second amplification transistor, and a first load transistor. The first load transistor receives a power source voltage. The imaging device includes a first signal line coupled to the first amplification transistor and the first load transistor, a second signal line coupled to the second amplification transistor, and a first reset transistor configured to receive the power source voltage. A gate of the first reset transistor is coupled to the first load transistor. The first pixel includes a first photoelectric conversion element and the first amplification transistor, and the second pixel includes a second photoelectric conversion element and the second amplification transistor.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: January 18, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Hongbo Zhu, Mamoru Sato, Akihiko Kato
  • Patent number: 11153518
    Abstract: The present technology relates to a solid-state imaging element and an imaging apparatus that provides an ample dynamic range. The solid-state imaging element includes a pixel array section and a readout load section. The pixel array section has a readout pixel and a reference pixel. A pixel signal proportional to an amount of incident light is read out from the readout pixel. The reference pixel has characteristics similar to those of the readout pixel. The readout load section forms a differential amplification circuit together with the readout pixel and the reference pixel and inputs, to the reference pixel, a pseudo-dark current signal corresponding to a dark current signal that occurs in the readout pixel, thus canceling the dark current signal. The present technology is applicable to a CMOS image sensor.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: October 19, 2021
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Mamoru Sato
  • Publication number: 20210218926
    Abstract: To suppress deterioration of image quality. A solid-state imaging device (1) according to an embodiment includes a first vertical signal line (VSL0k) and a second vertical signal line (VSL1k), a current mirror circuit (141) connected to the first and the second vertical signal lines, a first unit pixel (11i) connected to the first vertical signal line, a second unit pixel (11i+1) connected to the second vertical signal line, a first unit cell (11D0) connected to the first vertical signal line, a second unit cell (11D1) connected to the second vertical signal line, a current supply line (VCOM) connected to the first and the second unit pixels and the first and the second unit cells, and a constant current circuit (142) connected to the current supply line.
    Type: Application
    Filed: August 16, 2019
    Publication date: July 15, 2021
    Inventor: MAMORU SATO
  • Publication number: 20210168317
    Abstract: A solid-state imaging device is disclosed. In one example, a solid-state imaging device includes a current mirror circuit connected to first and second vertical signal lines, first and second unit pixels connected to the first or the second vertical signal line, a current supply line connected to the first and the second unit pixels, and a constant current circuit connected to the current supply line. The unit pixels each include a photoelectric conversion element, a transfer transistor that transfers an electric charge generated in the photoelectric conversion element, first and second charge accumulation units that accumulate the transferred electric charge, a switching transistor configured to control accumulation of the electric charge by the second charge accumulation unit, and an amplification transistor that causes a voltage corresponding to electric charges accumulated the first and/or the second charge accumulation units to appear in the first or the second vertical signal line.
    Type: Application
    Filed: August 16, 2019
    Publication date: June 3, 2021
    Inventors: Mamoru Sato, Akihiko Kato
  • Publication number: 20210144326
    Abstract: To improve the image quality of image data in a solid-state imaging device that reads a signal according to a potential difference between respective floating diffusion regions of a pair of pixels. A pixel unit is provided with a plurality of rows each including a plurality of pixels. A readout row selection unit selects any of the plurality of rows as a readout row every time a predetermined period elapses, and causes each of the plurality of pixels in the readout row to generate a signal potential according to a received light amount. A reference row selection unit selects a row different from a previous row from among the plurality of rows as a current reference row every time the predetermined period elapses, and causes each of the plurality of pixels in the reference row to generate a predetermined reference potential. A readout circuit unit reads a voltage signal according to a difference between the signal potential and the reference potential.
    Type: Application
    Filed: January 10, 2019
    Publication date: May 13, 2021
    Inventors: Mamoru Sato, Akihiko Kato, Yusuke Oike
  • Patent number: 10972689
    Abstract: To prevent the black dot phenomenon from occurring in a differential amplification-type solid-state image sensor. A signal-side amplifier transistor generates an output voltage corresponding to a signal current corresponding to one of a pair of differential input voltages by supplying the signal current from an output node to a common-phase node. A reference-side amplifier transistor supplies a reference current corresponding to the other one of the pair of differential input voltages to the common-phase node. A constant current source constantly controls a sum of the signal current and the reference current to be merged at the common-phase node. A bypass control unit connects the output node and the common-phase node and supplies the signal current having a value corresponding to a predetermined limit voltage to the common-phase node in a case in which the output voltage reaches the limit voltage.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: April 6, 2021
    Assignee: Sony Corporation
    Inventors: Mamoru Sato, Akihiko Kato