Patents by Inventor Mamoru Seo

Mamoru Seo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7924064
    Abstract: An inverter circuit includes an IGBT (3) and an IGBT (4) connected in series between a power supply potential (Vcc) and a GND potential, and an HVIC (1) and an LVIC (2) for respectively controlling actuation of the IGBTs (3) and (4). The inverter circuit also includes a capacitor (5), a diode (6), and a resistor (7). The capacitor (5) is connected between a terminal (VS) and the GND potential. The diode (6) has a series connection to the capacitor (5) between the terminal (VS) and the GND potential, with such a polarity that a forward current flows from the GND potential to the terminal (VS). The resistor (7) is connected in parallel to the capacitor (5).
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: April 12, 2011
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toru Iwagami, Mamoru Seo
  • Patent number: 7683678
    Abstract: An inverter circuit includes an IGBT (3) and an IGBT (4) connected in series between a power supply potential (Vcc) and a GND potential, and an HVIC (1) and an LVIC (2) for respectively controlling actuation of the IGBTs (3) and (4). The inverter circuit also includes a capacitor (5), a diode (6), and a resistor (7). The capacitor (5) is connected between a terminal (VS) and the GND potential. The diode (6) has a series connection to the capacitor (5) between the terminal (VS) and the GND potential, with such a polarity that a forward current flows from the GND potential to the terminal (VS). The resistor (7) is connected in parallel to the capacitor (5).
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: March 23, 2010
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toru Iwagami, Mamoru Seo
  • Publication number: 20090180228
    Abstract: An inverter circuit includes an IGBT (3) and an IGBT (4) connected in series between a power supply potential (Vcc) and a GND potential, and an HVIC (1) and an LVIC (2) for respectively controlling actuation of the IGBTs (3) and (4). The inverter circuit also includes a capacitor (5), a diode (6), and a resistor (7). The capacitor (5) is connected between a terminal (VS) and the GND potential. The diode (6) has a series connection to the capacitor (5) between the terminal (VS) and the GND potential, with such a polarity that a forward current flows from the GND potential to the terminal (VS). The resistor (7) is connected in parallel to the capacitor (5).
    Type: Application
    Filed: March 20, 2008
    Publication date: July 16, 2009
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Toru Iwagami, Mamoru Seo
  • Publication number: 20080211547
    Abstract: An inverter circuit includes an IGBT (3) and an IGBT (4) connected in series between a power supply potential (Vcc) and a GND potential, and an HVIC (1) and an LVIC (2) for respectively controlling actuation of the IGBTs (3) and (4). The inverter circuit also includes a capacitor (5), a diode (6), and a resistor (7). The capacitor (5) is connected between a terminal (VS) and the GND potential. The diode (6) has a series connection to the capacitor (5) between the terminal (VS) and the GND potential, with such a polarity that a forward current flows from the GND potential to the terminal (VS). The resistor (7) is connected in parallel to the capacitor (5).
    Type: Application
    Filed: March 20, 2008
    Publication date: September 4, 2008
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Toru Iwagami, Mamoru Seo
  • Patent number: 7102376
    Abstract: A power semiconductor module has a detector for detecting main circuit current passing through a power semiconductor element. The detector includes first and second circuit patterns; a bonding wire connected at first and second bonding points with the first and second circuit patterns, respectively; and a pair of terminal patterns extended from near the first and second bonding points of the first and second circuit patterns. The detector is designed to detect a potential difference between the pair of terminal patterns generated by flowing main circuit current through the first circuit pattern, the bonding wire and then the second circuit pattern, in order to detect a potential difference across the bonding wire.
    Type: Grant
    Filed: May 17, 2004
    Date of Patent: September 5, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toru Iwagami, Shinya Shirakawa, Mamoru Seo, Masaki Sakai, Dong Wang
  • Publication number: 20050116744
    Abstract: An inverter circuit includes an IGBT (3) and an IGBT (4) connected in series between a power supply potential (Vcc) and a GND potential, and an HVIC (1) and an LVIC (2) for respectively controlling actuation of the IGBTs (3) and (4). The inverter circuit also includes a capacitor (5), a diode (6), and a resistor (7). The capacitor (5) is connected between a terminal (VS) and the GND potential. The diode (6) has a series connection to the capacitor (5) between the terminal (VS) and the GND potential, with such a polarity that a forward current flows from the GND potential to the terminal (VS). The resistor (7) is connected in parallel to the capacitor (5).
    Type: Application
    Filed: July 26, 2004
    Publication date: June 2, 2005
    Inventors: Toru Iwagami, Mamoru Seo
  • Publication number: 20050007139
    Abstract: A power semiconductor module has a detector for detecting main circuit current passing through a power semiconductor element. The detector includes first and second circuit patterns; a bonding wire connected at first and second bonding points with the first and second circuit patterns, respectively; and a pair of terminal patterns extended from near the first and second bonding points of the first and second circuit patterns. The detector is designed to detect a potential difference between the pair of terminal patterns generated by flowing main circuit current through the first circuit pattern, the bonding wire and then the second circuit pattern, in order to detect a potential difference across the bonding wire.
    Type: Application
    Filed: May 17, 2004
    Publication date: January 13, 2005
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toru Iwagami, Shinya Shirakawa, Mamoru Seo, Masaki Sakai, Dong Wang
  • Patent number: 4114054
    Abstract: A solid state relay is arranged in high density to connect a first circuit comprising an outer signal source to a second circuit for driving a load by a photocoupler. A diode or a capacitor is connected in parallel to the light-receiving element of the photocoupler to maintain the voltage between the terminals of the light-receiving element to less than the reverse breakdown voltage of the light-receiving element when a surge voltage having rapid rise time is applied between the input side and the output side of the photocoupler.A transistor which causes the reverse breakdown prior to the reverse breakdown of the light-receiving element can be connected in parallel to the light-receiving element.
    Type: Grant
    Filed: January 31, 1977
    Date of Patent: September 12, 1978
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mamoru Seo, Akio Uenishi