Patents by Inventor Mamoru Takaku

Mamoru Takaku has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor memory device and semiconductor device
    Patent number: 7426152
    Abstract: A technology capable of improving the yield by the trimming of internal properties of a semiconductor device is provided. A semiconductor device is provided with an internal voltage step-down circuit and an internal voltage step-up circuit whose property values (internal voltage and others) are variable, a fuse circuit unit, a JTAG function unit 304 which inputs and retains signals from outside, a control circuit which perform logical operation based on an output signal of the fuse circuit unit and an output signal of the JTAG function unit, and the property values of the internal voltage step-down circuit and the internal voltage step-up circuit are controlled based on a result of the logical operation by the control circuit.
    Type: Grant
    Filed: July 18, 2007
    Date of Patent: September 16, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Masahiro Yamashita, Takashi Uehara, Mamoru Takaku, Hiroaki Nambu
  • Semiconductor memory device and semiconductor device
    Publication number: 20070274139
    Abstract: A technology capable of improving the yield by the trimming of internal properties of a semiconductor device is provided. A semiconductor device is provided with an internal voltage step-down circuit and an internal voltage step-up circuit whose property values (internal voltage and others) are variable, a fuse circuit unit, a JTAG function unit 304 which inputs and retains signals from outside, a control circuit which perform logical operation based on an output signal of the fuse circuit unit and an output signal of the JTAG function unit, and the property values of the internal voltage step-down circuit and the internal voltage step-up circuit are controlled based on a result of the logical operation by the control circuit.
    Type: Application
    Filed: July 18, 2007
    Publication date: November 29, 2007
    Inventors: Masahiro Yamashita, Takashi Uehara, Mamoru Takaku, Hiroaki Nambu
  • Semiconductor memory device and semiconductor device
    Patent number: 7269086
    Abstract: A technology capable of improving the yield by the trimming of internal properties of a semiconductor device is provided. A semiconductor device is provided with an internal voltage step-down circuit and an internal voltage step-up circuit whose property values (internal voltage and others) are variable, a fuse circuit unit, a JTAG function unit 304 which inputs and retains signals from outside, a control circuit which perform logical operation based on an output signal of the fuse circuit unit and an output signal of the JTAG function unit, and the property values of the internal voltage step-down circuit and the internal voltage step-up circuit are controlled based on a result of the logical operation by the control circuit.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: September 11, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Masahiro Yamashita, Takashi Uehara, Mamoru Takaku, Hiroaki Nambu
  • Semiconductor memory device and semiconductor device
    Publication number: 20060221727
    Abstract: A technology capable of improving the yield by the trimming of internal properties of a semiconductor device is provided. A semiconductor device is provided with an internal voltage step-down circuit and an internal voltage step-up circuit whose property values (internal voltage and others) are variable, a fuse circuit unit, a JTAG function unit 304 which inputs and retains signals from outside, a control circuit which perform logical operation based on an output signal of the fuse circuit unit and an output signal of the JTAG function unit, and the property values of the internal voltage step-down circuit and the internal voltage step-up circuit are controlled based on a result of the logical operation by the control circuit.
    Type: Application
    Filed: March 29, 2006
    Publication date: October 5, 2006
    Inventors: Masahiro Yamashita, Takashi Uehara, Mamoru Takaku, Hiroaki Nambu