Patents by Inventor Mamoru Terauchi

Mamoru Terauchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6835963
    Abstract: This invention provides a light-emitting element that comprises a light-emitting portion made of a nitride semiconductor; and a first wavefront converter for converting the radiated shape of light that is emitted from the light-emitting portion into a radiated shape that is smaller than the wavelength thereof, and emitting the same as output light. In this case, the first wavefront converter has a small aperture of a diameter that is smaller than the wavelength of light that is emitted from the light-emitting portion. If the output light is made to comprise an evanescent wave that is emitted to the exterior through this small aperture, it is possible to obtain an extremely small light spot.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: December 28, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Genichi Hatakoshi, Hidetoshi Fujimoto, Mamoru Terauchi
  • Publication number: 20030209722
    Abstract: This invention provides a light-emitting element that comprises a light-emitting portion made of a nitride semiconductor; and a first wavefront converter for converting the radiated shape of light that is emitted from the light-emitting portion into a radiated shape that is smaller than the wavelength thereof, and emitting the same as output light. In this case, the first wavefront converter has a small aperture of a diameter that is smaller than the wavelength of light that is emitted from the light-emitting portion. If the output light is made to comprise an evanescent wave that is emitted to the exterior through this small aperture, it is possible to obtain an extremely small light spot.
    Type: Application
    Filed: June 20, 2003
    Publication date: November 13, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Genichi Hatakoshi, Hidetoshi Fujimoto, Mamoru Terauchi
  • Patent number: 6611003
    Abstract: This invention provides a light-emitting element that comprises a light-emitting portion made of a nitride semiconductor; and a first wavefront converter for converting the radiated shape of light that is emitted from the light-emitting portion into a radiated shape that is smaller than the wavelength thereof, and emitting the same as output light. In this case, the first wavefront converter has a small aperture of a diameter that is smaller than the wavelength of light that is emitted from the light-emitting portion. If the output light is made to comprise an evanescent wave that is emitted to the exterior through this small aperture, it is possible to obtain an extremely small light spot.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: August 26, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Genichi Hatakoshi, Hidetoshi Fujimoto, Mamoru Terauchi
  • Patent number: 6174779
    Abstract: In a lateral bipolar transistor, its emitter region, base region, link base region, and so forth, are made in self alignment with side walls of masks by using partly overlapping two mask patterns. Therefore, not relying on the mask alignment accuracy, these regions are made in a precisely controlled positional relation. Thus, the lateral bipolar transistor, thus obtained, is reduced in parasitic resistance of the base and parasitic junction capacitance between the emitter and the base, and alleviated in variance of characteristics caused by fluctuation of the length of a link base region, length of the emitter-base junction and relative positions of the emitter and the collector, and can be manufactured with a high reproducibility.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: January 16, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomoaki Shino, Takashi Yamada, Makoto Yoshimi, Shigeru Kawanaka, Hideaki Nii, Kazumi Inoh, Tsuneaki Fuse, Sadayuki Yoshitomi, Mamoru Terauchi
  • Patent number: 6060751
    Abstract: A semiconductor device comprises a composite substrate comprising a semiconductor substrate and a semiconductor layer on said semiconductor substrate with a dielectric layer interposed therebetween; a plurality of element regions formed in the semiconductor layer and each having formed a field effect transistor including a source region and a drain region of a first conduction type; and an impurity-diffused region of a second conduction type which is formed directly under an element isolating film isolating respective elements. The impurity-diffused region having the opposite conduction type and formed under the element separating film restrain formation of parasitic transistors and prevent a decrease in threshold value.
    Type: Grant
    Filed: July 8, 1996
    Date of Patent: May 9, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mamoru Terauchi, Manabu Kamikokuryou
  • Patent number: 5844278
    Abstract: The present invention provides a semiconductor device which includes a substrate having a projection-shaped semiconductor element region, a gate electrode formed through a gate insulating film on the upper face and side face of the element region, and a first conductivity type source region and drain region provided in a manner to form a channel region on the upper face of the element region across the gate electrode, and which has a high concentration impurity region containing a second conductivity type impurity at a concentration higher than that on the surface of the channel region in the central part of the projection-shaped semiconductor element region.
    Type: Grant
    Filed: September 13, 1995
    Date of Patent: December 1, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomohisa Mizuno, Yukihiro Ushiku, Makoto Yoshimi, Mamoru Terauchi, Shigeru Kawanaka
  • Patent number: 5698869
    Abstract: A structure of a semiconductor device and a method of manufacturing the same is provided wherein a leakage current can be reduced while improving a drain breakdown voltage of an Insulated-Gate transistor such as a MOSFET, MOSSIT and a MISFET, and a holding characteristic of a memory cell such as a DRAM using these transistors as switching transistors can be improved, and further a reliability of a gate oxide film in a transfer gate can be improved. More particularly, a narrow band gap semiconductor region such as Si.sub.x Ge.sub.1-x, Si.sub.x Sn.sub.1-x, PbS is formed in an interior of a source region or a drain region in the SOI.IG-device. By selecting location and/or mole fraction of the narrow band gap semiconductor region in a SOI film, or selecting a kind of impurity element to compensate the crystal lattice mismatching due to the narrow-bandgap semiconductor region, the generation of crystal defects can be suppressed.
    Type: Grant
    Filed: September 13, 1995
    Date of Patent: December 16, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Makoto Yoshimi, Satoshi Inaba, Atsushi Murakoshi, Mamoru Terauchi, Naoyuki Shigyo, Yoshiaki Matsushita, Masami Aoki, Takeshi Hamamoto, Yutaka Ishibashi, Tohru Ozaki, Hitomi Kawaguchiya, Kazuya Matsuzawa, Osamu Arisumi, Akira Nishiyama