Patents by Inventor Mamoru Yamagami
Mamoru Yamagami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11908777Abstract: A semiconductor device includes a semiconductor chip, a plurality of leads that each includes a lead body portion which has a mounting portion which includes an upper surface whereon a semiconductor chip is bonded, and a lead connecting portion for external connection which projects downward from a lower surface of the lead body portion, a first sealing resin that seals a space that is defined by each lead body portion and each lead connecting portion of the plurality of leads in a region below the upper surface of each lead body portion of the plurality of leads, and a second sealing resin that seals the semiconductor chip in a region above the upper surface of each lead body portion of the plurality of leads.Type: GrantFiled: May 27, 2022Date of Patent: February 20, 2024Assignee: ROHM CO., LTD.Inventor: Mamoru Yamagami
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Publication number: 20240038635Abstract: A semiconductor device includes a semiconductor chip, a plurality of leads that each includes a lead body portion which has a mounting portion which includes an upper surface whereon a semiconductor chip is bonded, and a lead connecting portion for external connection which projects downward from a lower surface of the lead body portion, a first sealing resin that seals a space that is defined by each lead body portion and each lead connecting portion of the plurality of leads in a region below the upper surface of each lead body portion of the plurality of leads, and a second sealing resin that seals the semiconductor chip in a region above the upper surface of each lead body portion of the plurality of leads.Type: ApplicationFiled: October 12, 2023Publication date: February 1, 2024Applicant: ROHM CO., LTD.Inventor: Mamoru YAMAGAMI
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Publication number: 20240021592Abstract: A semiconductor device includes a substrate having a main surface, a plurality of first wirings, each having a first embedded part embedded in the substrate and exposed from the main surface, and a mounted part which is in contact with the main surface and is connected to the first embedded part, a semiconductor element having an element rear surface and a plurality of electrodes bonded to the mounted parts, a plurality of second wirings, each having a second embedded part embedded in the substrate and exposed from the main surface and a columnar part protruding from the second embedded part in the thickness direction, and being located outward from the semiconductor element as viewed in the thickness direction; and a passive element located on the side facing the main surface in the thickness direction more than the semiconductor element, and electrically connected to the plurality of second wirings.Type: ApplicationFiled: September 13, 2023Publication date: January 18, 2024Inventors: Isamu NISHIMURA, Mamoru YAMAGAMI
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Patent number: 11817439Abstract: A semiconductor device includes a substrate having a main surface, a plurality of first wirings, each having a first embedded part embedded in the substrate and exposed from the main surface, and a mounted part which is in contact with the main surface and is connected to the first embedded part, a semiconductor element having an element rear surface and a plurality of electrodes bonded to the mounted parts, a plurality of second wirings, each having a second embedded part embedded in the substrate and exposed from the main surface and a columnar part protruding from the second embedded part in the thickness direction, and being located outward from the semiconductor element as viewed in the thickness direction; and a passive element located on the side facing the main surface in the thickness direction more than the semiconductor element, and electrically connected to the plurality of second wirings.Type: GrantFiled: November 15, 2021Date of Patent: November 14, 2023Assignee: ROHM CO., LTD.Inventors: Isamu Nishimura, Mamoru Yamagami
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Patent number: 11804422Abstract: A semiconductor device includes a semiconductor chip, a plurality of leads that each includes a lead body portion which has a mounting portion which includes an upper surface whereon a semiconductor chip is bonded, and a lead connecting portion for external connection which projects downward from a lower surface of the lead body portion, a first sealing resin that seals a space that is defined by each lead body portion and each lead connecting portion of the plurality of leads in a region below the upper surface of each lead body portion of the plurality of leads, and a second sealing resin that seals the semiconductor chip in a region above the upper surface of each lead body portion of the plurality of leads.Type: GrantFiled: May 27, 2022Date of Patent: October 31, 2023Assignee: ROHM CO., LTD.Inventor: Mamoru Yamagami
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Publication number: 20230207444Abstract: A semiconductor device includes a semiconductor element, an internal electrode connected to the semiconductor element, a sealing resin covering the semiconductor element and a portion of the internal electrode, and an external electrode exposed from the sealing resin and connected to the internal electrode. The internal electrode includes a wiring layer and a columnar portion, where the wiring layer has a wiring layer front surface facing the back surface of the semiconductor element and a wiring layer back surface facing opposite from the wiring layer front surface in the thickness direction. The columnar portion protrudes in the thickness direction from the wiring layer front surface. The columnar portion has an exposed side surface facing in a direction perpendicular to the thickness direction. The external electrode includes a first cover portion covering the exposed side surface.Type: ApplicationFiled: February 17, 2023Publication date: June 29, 2023Inventors: Yusuke HARADA, Mamoru YAMAGAMI
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Patent number: 11616009Abstract: A semiconductor device includes a semiconductor element, an internal electrode connected to the semiconductor element, a sealing resin covering the semiconductor element and a portion of the internal electrode, and an external electrode exposed from the sealing resin and connected to the internal electrode. The internal electrode includes a wiring layer and a columnar portion, where the wiring layer has a wiring layer front surface facing the back surface of the semiconductor element and a wiring layer back surface facing opposite from the wiring layer front surface in the thickness direction. The columnar portion protrudes in the thickness direction from the wiring layer front surface. The columnar portion has an exposed side surface facing in a direction perpendicular to the thickness direction. The external electrode includes a first cover portion covering the exposed side surface.Type: GrantFiled: April 8, 2021Date of Patent: March 28, 2023Assignee: ROHM CO., LTD.Inventors: Yusuke Harada, Mamoru Yamagami
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Publication number: 20220293496Abstract: A semiconductor device includes a semiconductor chip, a plurality of leads that each includes a lead body portion which has a mounting portion which includes an upper surface whereon a semiconductor chip is bonded, and a lead connecting portion for external connection which projects downward from a lower surface of the lead body portion, a first sealing resin that seals a space that is defined by each lead body portion and each lead connecting portion of the plurality of leads in a region below the upper surface of each lead body portion of the plurality of leads, and a second sealing resin that seals the semiconductor chip in a region above the upper surface of each lead body portion of the plurality of leads.Type: ApplicationFiled: May 27, 2022Publication date: September 15, 2022Inventor: Mamoru YAMAGAMI
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Patent number: 11373935Abstract: A semiconductor device includes a semiconductor chip, a plurality of leads that each includes a lead body portion which has amounting portion which includes an upper surface whereon a semiconductor chip is bonded, and a lead connecting portion for external connection which projects downward from a lower surface of the lead body portion, a first sealing resin that seals a space that is defined by each lead body portion and each lead connecting portion of the plurality of leads in a region below the upper surface of each lead body portion of the plurality of leads, and a second sealing resin that seals the semiconductor chip in a region above the upper surface of each lead body portion of the plurality of leads.Type: GrantFiled: February 9, 2017Date of Patent: June 28, 2022Assignee: ROHM CO., LTD.Inventor: Mamoru Yamagami
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Publication number: 20220077124Abstract: A semiconductor device includes a substrate having a main surface, a plurality of first wirings, each having a first embedded part embedded in the substrate and exposed from the main surface, and a mounted part which is in contact with the main surface and is connected to the first embedded part, a semiconductor element having an element rear surface and a plurality of electrodes bonded to the mounted parts, a plurality of second wirings, each having a second embedded part embedded in the substrate and exposed from the main surface and a columnar part protruding from the second embedded part in the thickness direction, and being located outward from the semiconductor element as viewed in the thickness direction; and a passive element located on the side facing the main surface in the thickness direction more than the semiconductor element, and electrically connected to the plurality of second wirings.Type: ApplicationFiled: November 15, 2021Publication date: March 10, 2022Inventors: Isamu NISHIMURA, Mamoru YAMAGAMI
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Patent number: 11211368Abstract: A semiconductor device includes a substrate having a main surface, a plurality of first wirings, each having a first embedded part embedded in the substrate and exposed from the main surface, and a mounted part which is in contact with the main surface and is connected to the first embedded part, a semiconductor element having an element rear surface and a plurality of electrodes bonded to the mounted parts, a plurality of second wirings, each having a second embedded part embedded in the substrate and exposed from the main surface and a columnar part protruding from the second embedded part in the thickness direction, and being located outward from the semiconductor element as viewed in the thickness direction; and a passive element located on the side facing the main surface in the thickness direction more than the semiconductor element, and electrically connected to the plurality of second wirings.Type: GrantFiled: November 26, 2019Date of Patent: December 28, 2021Assignee: ROHM CO., LTD.Inventors: Isamu Nishimura, Mamoru Yamagami
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Publication number: 20210225755Abstract: A semiconductor device includes a semiconductor element, an internal electrode connected to the semiconductor element, a sealing resin covering the semiconductor element and a portion of the internal electrode, and an external electrode exposed from the sealing resin and connected to the internal electrode. The internal electrode includes a wiring layer and a columnar portion, where the wiring layer has a wiring layer front surface facing the back surface of the semiconductor element and a wiring layer back surface facing opposite from the wiring layer front surface in the thickness direction. The columnar portion protrudes in the thickness direction from the wiring layer front surface. The columnar portion has an exposed side surface facing in a direction perpendicular to the thickness direction. The external electrode includes a first cover portion covering the exposed side surface.Type: ApplicationFiled: April 8, 2021Publication date: July 22, 2021Inventors: Yusuke HARADA, Mamoru YAMAGAMI
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Patent number: 11004782Abstract: A semiconductor device includes a semiconductor element, an internal electrode connected to the semiconductor element, a sealing resin covering the semiconductor element and a portion of the internal electrode, and an external electrode exposed from the sealing resin and connected to the internal electrode. The internal electrode includes a wiring layer and a columnar portion, where the wiring layer has a wiring layer front surface facing the back surface of the semiconductor element and a wiring layer back surface facing opposite from the wiring layer front surface in the thickness direction. The columnar portion protrudes in the thickness direction from the wiring layer front surface. The columnar portion has an exposed side surface facing in a direction perpendicular to the thickness direction. The external electrode includes a first cover portion covering the exposed side surface.Type: GrantFiled: March 15, 2019Date of Patent: May 11, 2021Assignee: ROHM CO., LTD.Inventors: Yusuke Harada, Mamoru Yamagami
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Patent number: 10832990Abstract: The present invention provides a semiconductor device capable of being miniaturized and preventing reduction of mountability to a wiring substrate. The semiconductor device includes a conductive support having a support surface and a mounting surface facing opposite sides in a thickness direction z, and an end surface intersecting with the mounting surface and facing outside; a semiconductor element having an element back surface facing the support surface and an electrode formed on the element back surface, in which the electrode is connected to the support surface; and an external terminal conducted to the mounting surface and exposed to the outside; wherein the external terminal includes a Ni layer having P and an Au layer, and respectively connected to and laminated with at least one portion of each of the mounting surface and the end surface.Type: GrantFiled: July 23, 2018Date of Patent: November 10, 2020Assignee: ROHM CO., LTD.Inventor: Mamoru Yamagami
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Patent number: 10804190Abstract: A multi-chip module includes a plurality of chip parts with each chip part having an electrode, a sealing resin for sealing the plurality of chip parts, and an external connection terminal secured to the sealing resin so as to be exposed from the outer surface of the sealing resin and electrically connected to the electrode of at least one of the chip parts.Type: GrantFiled: June 13, 2016Date of Patent: October 13, 2020Assignee: ROHM CO., LTD.Inventors: Mamoru Yamagami, Yasuhiro Fuwa, Hideaki Yanagida, Takafumi Okada
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Publication number: 20200176428Abstract: A semiconductor device includes a substrate having a main surface, a plurality of first wirings, each having a first embedded part embedded in the substrate and exposed from the main surface, and a mounted part which is in contact with the main surface and is connected to the first embedded part, a semiconductor element having an element rear surface and a plurality of electrodes bonded to the mounted parts, a plurality of second wirings, each having a second embedded part embedded in the substrate and exposed from the main surface and a columnar part protruding from the second embedded part in the thickness direction, and being located outward from the semiconductor element as viewed in the thickness direction; and a passive element located on the side facing the main surface in the thickness direction more than the semiconductor element, and electrically connected to the plurality of second wirings.Type: ApplicationFiled: November 26, 2019Publication date: June 4, 2020Inventors: Isamu NISHIMURA, Mamoru YAMAGAMI
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Patent number: 10504822Abstract: [Object] A semiconductor device is configured to release heat from semiconductor chips more efficiently. [Means for Solution] A semiconductor device includes: a die pad 11 which has a die pad main surface 111 and a die pad rear surface 112; a semiconductor chip 41 mounted on the die pad main surface 111; a sealing resin portion 7 formed with a recess 75 for exposure of the die pad rear surface 11 and covering the die pad 11 and the semiconductor chip 41; and a heat releasing layer 6 disposed in the recess 75. The recess 75 has a recess groove 753 outside the die pad 11 in a direction in which the die pad rear surface 112 extends, and the recess groove 753 is closer to the die pad main surface 111 than to the die pad rear surface 112. The heat releasing layer 6 has a junction layer which is in contact with the die pad rear surface 112 and having part thereof filling the recess groove 753.Type: GrantFiled: January 11, 2018Date of Patent: December 10, 2019Assignee: ROHM CO., LTD.Inventors: Shoji Yasunaga, Mamoru Yamagami
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Publication number: 20190287890Abstract: A semiconductor device includes a semiconductor element, an internal electrode connected to the semiconductor element, a sealing resin covering the semiconductor element and a portion of the internal electrode, and an external electrode exposed from the sealing resin and connected to the internal electrode. The internal electrode includes a wiring layer and a columnar portion, where the wiring layer has a wiring layer front surface facing the back surface of the semiconductor element and a wiring layer back surface facing opposite from the wiring layer front surface in the thickness direction. The columnar portion protrudes in the thickness direction from the wiring layer front surface. The columnar portion has an exposed side surface facing in a direction perpendicular to the thickness direction. The external electrode includes a first cover portion covering the exposed side surface.Type: ApplicationFiled: March 15, 2019Publication date: September 19, 2019Inventors: Yusuke HARADA, Mamoru YAMAGAMI
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Publication number: 20190080988Abstract: The present invention provides a semiconductor device capable of being miniaturized and preventing reduction of mountability to a wiring substrate. The semiconductor device includes a conductive support having a support surface and a mounting surface facing opposite sides in a thickness direction z, and an end surface intersecting with the mounting surface and facing outside; a semiconductor element having an element back surface facing the support surface and an electrode formed on the element back surface, in which the electrode is connected to the support surface; and an external terminal conducted to the mounting surface and exposed to the outside; wherein the external terminal includes a Ni layer having P and an Au layer, and respectively connected to and laminated with at least one portion of each of the mounting surface and the end surface.Type: ApplicationFiled: July 23, 2018Publication date: March 14, 2019Inventor: Mamoru YAMAGAMI
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Patent number: 10109611Abstract: An inventive semiconductor device includes: a semiconductor chip including an integrated circuit; a plurality of electrode pads provided on the semiconductor chip and connected to the integrated circuit; a rewiring to which the electrode pads are electrically connected together, the rewiring being exposed on an outermost surface of the semiconductor chip and having an exposed surface area greater than the total area of the electrode pads; and a resin package which seals the semiconductor chip.Type: GrantFiled: October 24, 2017Date of Patent: October 23, 2018Assignee: ROHM CO., LTD.Inventors: Mamoru Yamagami, Kenji Fujii