Patents by Inventor Man Hon Cheng

Man Hon Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6958261
    Abstract: An image sensor device includes a QFN type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads. A sensor IC is attached to the flag. The IC has a first surface with an active area and a peripheral bonding pad area that includes bonding pads. Wires are wirebonded to respective ones of the IC bonding pads and corresponding ones of the leadframe bonding pads, thereby electrically connecting the IC and the leadframe. Stud bumps are formed on the first surface of the IC and a transparent cover is disposed over the IC active area and resting on the stud bumps. The cover allows light to pass therethrough onto the IC active area. A mold compound is formed over the leadframe, wirebonds and a peripheral portion of the cover.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: October 25, 2005
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Wai Wong Chow, Man Hon Cheng, Wai Keung Ho
  • Patent number: 6875635
    Abstract: A semiconductor device 30 includes a base carrier 32, an adhesive material layer 36 and an integrated circuit die 34. The base carrier 32 has a top side and a bottom side, the top side having a central area for receiving the die 34 and a peripheral area surrounding the central area. The adhesive material layer 36 is disposed on the top side of the base carrier in an “X” shaped pattern. The “X” shaped pattern includes two bisecting lines. The two bisecting lines extend well beyond the central area and into the peripheral area of the base carrier top surface. The die 34 is attached to the base carrier 32 with the adhesive material layer 36 at the central area. Even after attachment of the die 34, the adhesive material 36 extends well beyond the die 34 and the central area into the peripheral area.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: April 5, 2005
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Man Hon Cheng, Wai Wong Chow, Wai Keung Ho
  • Patent number: 6838751
    Abstract: A leadframe (20) for a semiconductor device includes a paddle ring (22) having an inner perimeter (24), an outer perimeter (26), and a cavity (28) located within the inner perimeter (24) for receiving an integrated circuit die (30). A first row of terminals (32) surrounds the outer perimeter (26) and a second row of terminals (34) surrounds the first row of terminals (32). Each of the terminals of the first row of terminals (32) is individually connected to the paddle ring (22) and each of the terminals of the second row of terminals (34) is connected to one side of a connection bar (78, 79), which is connected to one of the terminals of the first row (32) or to the paddle ring (22).
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: January 4, 2005
    Assignee: Freescale Semiconductor Inc.
    Inventors: Man Hon Cheng, Wai Wong Chow, Fei Ying Wong
  • Patent number: 6798074
    Abstract: A semiconductor device 30 includes a base carrier 32, an adhesive material layer 36 and an integrated circuit die 34. The base carrier 32 has a top side and a bottom side, the top side having a central area for receiving the die 34 and a peripheral area surrounding the central area. The adhesive material layer 36 is disposed on the top side of the base carrier in an “X” shaped pattern. The “X” shaped pattern includes two bisecting lines. The two bisecting lines extend well beyond the central area and into the peripheral area of the base carrier top surface. The die 34 is attached to the base carrier 32 with the adhesive material layer 36 at the central area. Even after attachment of the die 34, the adhesive material 36 extends well beyond the die 34 and the central area into the peripheral area.
    Type: Grant
    Filed: March 4, 2002
    Date of Patent: September 28, 2004
    Assignee: Motorola, Inc.
    Inventors: Man Hon Cheng, Wai Wong Chow, Wai Keung Ho
  • Publication number: 20040178511
    Abstract: A semiconductor device 30 includes a base carrier 32, an adhesive material layer 36 and an integrated circuit die 34. The base carrier 32 has a top side and a bottom side, the top side having a central area for receiving the die 34 and a peripheral area surrounding the central area. The adhesive material layer 36 is disposed on the top side of the base carrier in an “X” shaped pattern. The “X” shaped pattern includes two bisecting lines. The two bisecting lines extend well beyond the central area and into the peripheral area of the base carrier top surface. The die 34 is attached to the base carrier 32 with the adhesive material layer 36 at the central area. Even after attachment of the die 34, the adhesive material 36 extends well beyond the die 34 and the central area into the peripheral area.
    Type: Application
    Filed: March 29, 2004
    Publication date: September 16, 2004
    Inventors: Man Hon Cheng, Wai Wong Chow, Wai Keung Ho
  • Publication number: 20040080029
    Abstract: An image sensor device includes a QFN type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads. A sensor IC is attached to the flag. The IC has a first surface with an active area and a peripheral bonding pad area that includes bonding pads. Wires are wirebonded to respective ones of the IC bonding pads and corresponding ones of the leadframe bonding pads, thereby electrically connecting the IC and the leadframe. Stud bumps are formed on the first surface of the IC and a transparent cover is disposed over the IC active area and resting on the stud bumps. The cover allows light to pass therethrough onto the IC active area. A mold compound is formed over the leadframe, wirebonds and a peripheral portion of the cover.
    Type: Application
    Filed: October 14, 2003
    Publication date: April 29, 2004
    Inventors: Wai Wong Chow, Man Hon Cheng, Wai Keung Ho
  • Patent number: 6667543
    Abstract: An image sensor device includes a QFN type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads. A sensor IC is attached to the flag. The IC has a first surface with an active area and a peripheral bonding pad area that includes bonding pads. Wires are wirebonded to respective ones of the IC bonding pads and corresponding ones of the leadframe bonding pads, thereby electrically connecting the IC and the leadframe. Stud bumps are formed on the first surface of the IC and a transparent cover is disposed over the IC active area and resting on the stud bumps. The cover allows light to pass therethrough onto the IC active area. A mold compound is formed over the leadframe, wirebonds and a peripheral portion of the cover.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: December 23, 2003
    Assignee: Motorola, Inc.
    Inventors: Wai Wong Chow, Man Hon Cheng, Wai Keung Ho
  • Publication number: 20030168719
    Abstract: A leadframe (20) for a semiconductor device includes a paddle ring (22) having an inner perimeter (24), an outer perimeter (26), and a cavity (28) located within the inner perimeter (24) for receiving an integrated circuit die (30). A first row of terminals (32) surrounds the outer perimeter (26) and a second row of terminals (34) surrounds the first row of terminals (32). Each of the terminals of the first row of terminals (32) is individually connected to the paddle ring (22) and each of the terminals of the second row of terminals (34) is connected to one side of a connection bar (78, 79), which is connected to one of the terminals of the first row (32) or to the paddle ring (22).
    Type: Application
    Filed: March 6, 2002
    Publication date: September 11, 2003
    Inventors: Man Hon Cheng, Wai Wong Chow, Fei Ying Wong
  • Publication number: 20030164553
    Abstract: A semiconductor device 30 includes a base carrier 32, an adhesive material layer 36 and an integrated circuit die 34. The base carrier 32 has a top side and a bottom side, the top side having a central area for receiving the die 34 and a peripheral area surrounding the central area. The adhesive material layer 36 is disposed on the top side of the base carrier in an “X” shaped pattern. The “X” shaped pattern includes two bisecting lines. The two bisecting lines extend well beyond the central area and into the peripheral area of the base carrier top surface. The die 34 is attached to the base carrier 32 with the adhesive material layer 36 at the central area. Even after attachment of the die 34, the adhesive material 36 extends well beyond the die 34 and the central area into the peripheral area.
    Type: Application
    Filed: March 4, 2002
    Publication date: September 4, 2003
    Inventors: Man Hon Cheng, Wai Wong Chow, Wai Keung Ho
  • Publication number: 20020177254
    Abstract: A QFN semiconductor package (2) having a plurality of connection pads (4) and an embedded die (10) is disclosed. The connection pads (4) at least partially enclose a die receiving area (6). An insulator (8) is disposed in the die receiving area (6). The die (10) is attached to the insulator (8). The die (10) has a plurality of die bond pads. A plurality of connectors (12) connects the die bond pads to respective connection pads (4). An encapsulant (14) at least partially encapsulates the connection pads (4), insulator (8) and die (10). The connection pads (4) and insulator (8) have exposed surfaces on an outer surface of the encapsulant (14). The exposed surfaces are substantially co-planar with the outer surface of the encapsulant (14). A method of producing the semiconductor package (2) is also disclosed. Preferably, the insulator (8) includes a dispensed epoxy layer that is curable after the die is attached.
    Type: Application
    Filed: April 9, 2002
    Publication date: November 28, 2002
    Inventors: Wai Wong Chow, Fei Ying Wong, Man Hon Cheng