Abstract: Provided is a technology capable of consistently and stably forming a slope of a gate pulse modulation waveform by discharging a gate line by a predetermined current by using a regulator and the like in gate pulse modulation.

Abstract: A data driving integrated circuit of the present embodiment may include a digital to analog converter configured to change a digital signal into an analog signal and an amplifier configured to receive the analog signal through an input terminal and output a data voltage to a pixel connected to a data line, wherein the amplifier may receive, as feedback, one of a plurality of output signals from a plurality of output terminals.

Abstract: Provided is a technology capable of consistently and stably forming a slope of a gate pulse modulation waveform by discharging a gate line by a predetermined current by using a regulator and the like in gate pulse modulation.

Abstract: A data driving integrated circuit of the present embodiment may include a digital to analog converter configured to change a digital signal into an analog signal and an amplifier configured to receive the analog signal through an input terminal and output a data voltage to a pixel connected to a data line, wherein the amplifier may receive, as feedback, one of a plurality of output signals from a plurality of output terminals.

Abstract: The present embodiment relates to a data processing device and a display device and, more specifically, to data processing device and a display device for selectively applying an image quality improvement function in consideration of the characteristics depending on the positions on a display panel.

Abstract: The present embodiment relates to a data processing device and a display device and, more specifically, to data processing device and a display device for selectively applying an image quality improvement function in consideration of the characteristics depending on the positions on a display panel.

Abstract: Provided is a method of driving a liquid crystal display apparatus, and more particularly, to a method of generating a frame start pulse signal for instructing driving of a specific function of a source driver in a source driver chip of a liquid crystal display apparatus. Accordingly, by generating a frame start pulse signal for instructing driving of a specific function of a source driver in a source driver chip unlike a conventional method where the frame start pulse signal is externally input, it is possible to reduce the number of input pins for inputting the frame start pulse signal and to remove an input line for inputting the frame start pulse signal in a process of mounting the source driver chip in a printed circuit board.

Abstract: An LCM for a display panel includes a pixel array, a plurality of source driver ICs, and a plurality of gate driver ICs. The plurality of source driver ICs are disposed in a horizontal direction at an upper side or lower side of the pixel array. The plurality of gate driver ICs are disposed in a vertical direction at a left side or right side of the pixel array. The plurality of gate driver ICs are disposed at an opposite position to a position where a source driver IC, among the plurality of source driver ICs, first supplied with video data and a clock signal is disposed.

Abstract: Provided is a method of driving a liquid crystal display apparatus, and more particularly, to a method of generating a frame start pulse signal for instructing driving of a specific function of a source driver in a source driver chip of a liquid crystal display apparatus. Accordingly, by generating a frame start pulse signal for instructing driving of a specific function of a source driver in a source driver chip unlike a conventional method where the frame start pulse signal is externally input, it is possible to reduce the number of input pins for inputting the frame start pulse signal and to remove an input line for inputting the frame start pulse signal in a process of mounting the source driver chip in a printed circuit board.

Abstract: Disclosed are an offset compensation gamma buffer and a gray scale voltage generation circuit using the same. The offset compensation gamma buffer includes: a buffer which outputs an input voltage input to a positive or negative input terminal as an output voltage; and a switching unit which selectively connects the input voltage and the output voltage of the buffer to the positive and negative input terminals in response to a control signal. The output voltage of the offset compensation gamma buffer is supplied to the input of a gray scale voltage generation circuit of a source driver for driving a liquid crystal panel. The offset of the offset compensation gamma buffer is compensated using an inversion timing of the control signal. The output voltage of the offset compensation gamma buffer is supplied as a reference voltage of the voltage divider unit for generating the gray scale voltages, and the offset of the gray scale voltages is also compensated.