Patents by Inventor Man Kan

Man Kan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240082167
    Abstract: This disclosure relates to an engineered a novel synthetic artificial stem cell (SASC) system which mimics the paracrine effect of the stem cell secretome and provides tailorability of the composition for targeted tissue regeneration. This novel SASC system demonstrates the feasibility of developing a completely synthetic, tailorable stem cell secretome which reinforces the possibility of developing a new therapeutic strategy that provides better control over targeted tissue engineering applications. Disclosed herein are biodegradable polymeric microspheres that have been used to encapsulate secretome active agents. These microspheres mimic or have the potential to result in a greater therapeutic paracrine effect compared to stem cells, without the added risk of immunological response or the extra pro-inflammatory, antagonistic or inert factors/cytokines. The compositions may be personalized to any disease and/or individual, therefore, adding a much needed element to therapeutics.
    Type: Application
    Filed: January 21, 2022
    Publication date: March 14, 2024
    Inventors: Cato LAURENCIN, Shiv S. SHAH, Lakshmi NAIR, Ho-man KAN
  • Publication number: 20220282877
    Abstract: An air purifying module for use in air channel of an air handling unit of a central air conditioning system, comprising a first housing having air inlet surface and air exhaust surface to enable airflow, a panel member that is detachably installed in the first housing, the panel member comprises filter panel, two metal foam panels and a number of photocatalyst coated metal foam panels arranged in parallel in the direction from the air inlet surface to the air exhaust surface, a shortwave UV light member installed in the first housing, a control unit and a high voltage direct current generator installed in the external of the first housing. The air purifying module can effectively inactivate bacteria and pathogens, filter out volatile organic compounds, thereby providing highly efficient air purification and sterilization functions.
    Type: Application
    Filed: February 25, 2022
    Publication date: September 8, 2022
    Inventors: Ahim KHO, Ho Man KAN
  • Patent number: 11197770
    Abstract: One aspect of the invention provides a flow-diverting system including: a first stent having a proximal end, a distal end and a first sidewall opening; and a second stent having a proximal end, a distal end and a second sidewall opening. The first sidewall opening is of sufficient size for the distal end of the second stent to pass from inside the first stent through the first sidewall opening. The second sidewall opening is of sufficient size for fluid flow from inside the second stent through the second sidewall opening into the first stent.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: December 14, 2021
    Assignee: Baylor College of Medicine
    Inventors: Stephen P. Chen, Peter Tze Man Kan
  • Publication number: 20210282944
    Abstract: One aspect of the invention provides a flow-diverting system including: a first stent having a proximal end, a distal end and a first sidewall opening; and a second stent having a proximal end, a distal end and a second sidewall opening. The first sidewall opening is of sufficient size for the distal end of the second stent to pass from inside the first stent through the first sidewall opening. The second sidewall opening is of sufficient size for fluid flow from inside the second stent through the second sidewall opening into the first stent.
    Type: Application
    Filed: May 7, 2018
    Publication date: September 16, 2021
    Applicant: Baylor College of Medicine
    Inventors: Stephen P. Chen, Peter Tze Man Kan
  • Publication number: 20210051283
    Abstract: An image sensor may include an array of image pixels that is coupled to column readout circuitry, which may read out charge generated by the image pixels. The column readout circuitry may include a column amplifier having analog memory cells. The analog memory cells may include a high gain capacitor and a low gain capacitor coupled in parallel between a column of the image pixels and an input of the column amplifier. A feedback capacitor may be coupled between the input and an output of the column amplifier. High and low gain select switches respectively coupled to the high and low gain capacitors may allow for the output of high and low gain reset values and image signals, which may be used in correlated double sampling operations and which may increase the dynamic range of the image sensor.
    Type: Application
    Filed: October 29, 2019
    Publication date: February 18, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Nicholas Paul COWLEY, Tomas GEURTS, Chi Man KAN, Pawan GILHOTRA
  • Patent number: 9735765
    Abstract: Embodiments include apparatuses, methods, and systems for jitter equalization and phase error detection. In embodiments, a communication circuit may include a data path to pass a data signal and a clock path to pass a clock signal. A jitter equalizer may be coupled with the data path and/or clock path to provide a programmable delay to the data signal and/or clock signal, respectively. The delay may be determined by a training process in which a supply voltage may be modulated by a modulation frequency. The delay may be dependent on a value of the supply voltage, such as a voltage level and/or jitter frequency component of the supply voltage. A phase error detector is also described that may be used with the communication circuit and/or other embodiments.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: August 15, 2017
    Assignee: Intel Corporation
    Inventors: Nicholas P. Cowley, Chi Man Kan, Ruchir Saraswat
  • Patent number: 9582977
    Abstract: A method monitors the consumption of materials, including determining the presence of materials in a smart receptacle using a sensor located in the smart receptacle. A server is alerted when an actionable item is detected.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: February 28, 2017
    Assignee: Intel Corporation
    Inventors: Nicholas P. Cowley, Ruchir Saraswat, Colin L. Perry, Matthew T. Aitken, Richard J. Goldman, Chi Man Kan
  • Patent number: 9577523
    Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit, a switching regulator circuit, and a controller circuit configured to determine parameters of an external select input. The controller is configured to selectively couple, on a cold boot up, either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load based on the determination of parameters.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: February 21, 2017
    Assignee: Intel Corporation
    Inventors: Nicholas P. Cowley, Andrew D. Talbot, Mark Mudd, Stephen J. Spinks, Keith Pinson, Colin L. Perry, Alan J. Martin, Chi Man Kan, Matthew T. Aitken, William L. Barber, Isaac Ali
  • Publication number: 20160241223
    Abstract: Embodiments include apparatuses, methods, and systems for jitter equalization and phase error detection. In embodiments, a communication circuit may include a data path to pass a data signal and a clock path to pass a clock signal. A jitter equalizer may be coupled with the data path and/or clock path to provide a programmable delay to the data signal and/or clock signal, respectively. The delay may be determined by a training process in which a supply voltage may be modulated by a modulation frequency. The delay may be dependent on a value of the supply voltage, such as a voltage level and/or jitter frequency component of the supply voltage. A phase error detector is also described that may be used with the communication circuit and/or other embodiments.
    Type: Application
    Filed: February 9, 2016
    Publication date: August 18, 2016
    Inventors: Nicholas P. Cowley, Chi Man Kan, Ruchir Saraswat
  • Publication number: 20160180679
    Abstract: A method monitors the consumption of materials, including determining the presence of materials in a smart receptacle using a sensor located in the smart receptacle. A server is alerted when an actionable item is detected.
    Type: Application
    Filed: December 23, 2014
    Publication date: June 23, 2016
    Applicant: INTEL CORPORATION
    Inventors: Nicholas P. Cowley, Ruchir Saraswat, Colin L. Perry, Matthew T. Aitken, Richard J. Goldman, Chi Man Kan
  • Patent number: 9343963
    Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit; a switching regulator circuit; and a controller circuit configured to monitor operational parameters of the dual mode voltage regulator and selectively couple either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load. The selective coupling is based on the monitoring of parameters including current through the output load, voltage at the input voltage port and voltage at the output load as well as the availability of a system clock signal.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: May 17, 2016
    Assignee: Intel Corporation
    Inventors: Nicholas P. Cowley, Andrew D. Talbot, Isaac Ali, Keith Pinson, Colin L. Perry, Matthew T. Aitken, Chi Man Kan, Mark S. Mudd, Stephen J. Spinks, Alan J. Martin, William L. Barber
  • Patent number: 9288019
    Abstract: Embodiments include apparatuses, methods, and systems for jitter equalization and phase error detection. In embodiments, a communication circuit may include a data path to pass a data signal and a clock path to pass a clock signal. A jitter equalizer may be coupled with the data path and/or clock path to provide a programmable delay to the data signal and/or clock signal, respectively. The delay may be determined by a training process in which a supply voltage may be modulated by a modulation frequency. The delay may be dependent on a value of the supply voltage, such as a voltage level and/or jitter frequency component of the supply voltage. A phase error detector is also described that may be used with the communication circuit and/or other embodiments.
    Type: Grant
    Filed: July 3, 2014
    Date of Patent: March 15, 2016
    Assignee: INTEL CORPORATION
    Inventors: Nicholas P. Cowley, Chi Man Kan, Ruchir Saraswat
  • Publication number: 20160066724
    Abstract: Embodiments described herein relate generally to monitoring a dining session using smart smallwares. A smart smallware may sense usage or non-usage associated with a dining session of a customer. Based on the sensed non-usage of the smart smallware, the smart smallware may detect a period of inactivity. In response to the detected period of inactivity, the smart smallware may transmit an indication of the detected period of inactivity. This transmitted indication may cause an external monitoring device to notify a waitperson that a customer associated with that smart smallware may require attention. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: September 10, 2014
    Publication date: March 10, 2016
    Inventors: Nicholas P. Cowley, Ruchir Saraswat, Richard J. Goldman, Chi Man Kan, Matthew T. Aitken, Colin L. Perry
  • Publication number: 20160006544
    Abstract: Embodiments include apparatuses, methods, and systems for jitter equalization and phase error detection. In embodiments, a communication circuit may include a data path to pass a data signal and a clock path to pass a clock signal. A jitter equalizer may be coupled with the data path and/or clock path to provide a programmable delay to the data signal and/or clock signal, respectively. The delay may be determined by a training process in which a supply voltage may be modulated by a modulation frequency. The delay may be dependent on a value of the supply voltage, such as a voltage level and/or jitter frequency component of the supply voltage. A phase error detector is also described that may be used with the communication circuit and/or other embodiments.
    Type: Application
    Filed: July 3, 2014
    Publication date: January 7, 2016
    Inventors: Nicholas P. Cowley, Chi Man Kan, Ruchir Saraswat
  • Publication number: 20150042295
    Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit, a switching regulator circuit, and a controller circuit configured to determine parameters of an external select input. The controller is configured to selectively couple, on a cold boot up, either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load based on the determination of parameters.
    Type: Application
    Filed: March 1, 2012
    Publication date: February 12, 2015
    Inventors: Nicholas P. Cowley, Andrew D. Talbot, Mark Mudd, Stephen J. Spinks, Keith Pinson, Colin L. Perry, ALAN J. Martin, Chi Man Kan, Matthew T. Aitken, William L. Barber, Isaac Ali
  • Publication number: 20150035507
    Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit; a switching regulator circuit; and a controller circuit configured to monitor operational parameters of the dual mode voltage regulator and selectively couple either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load. The selective coupling is based on the monitoring of parameters including current through the output load, voltage at the input voltage port and voltage at the output load as well as the availability of a system clock signal.
    Type: Application
    Filed: December 22, 2011
    Publication date: February 5, 2015
    Inventors: Nicholas P. Cowley, Andrew D. Talbot, Isaac Ali, Keith Pinson, Colin L. Perry, Matthew T. Aitken, Chi Man Kan, Mark S. Mudd, Stephen J. Spinks, Alan J. Martin, William L. Barber
  • Publication number: 20050051587
    Abstract: The present invention relates to a pill box for splitting pills into halves. The pill box comprises a cover and a base which are connected pivotally by a staff. The cover has a blade holder inside, which has a plug pin at the bottom. At the bottom of the cover, there is a partition with an opening. The base has a pill receptacle and a slot. When the blade holder moves down, the blade and the plug pin pass through the opening. The blade cuts at the position of the pill receptacle and the plug pin plugs into the slot. The cover and the base are locked together. When the blade holder moves up and the plug pin completely moves out from the slot, the cover or the base can rotate out with the staff as a pivot. The present invention is safe, reliable, small and portable.
    Type: Application
    Filed: August 31, 2004
    Publication date: March 10, 2005
    Inventor: Man Kan
  • Publication number: 20030203725
    Abstract: A circuit stage such as an input stage is provided for a radio frequency tuner having an input which typically receives a broadband signal comprising many channels. The input stage comprises a low noise amplifier in the form of a long tail pair of transistors and a controllable tail current source. A level detector detects the signal level at the input of the amplifier and controls the tail current source so as to increase the tail current as the signal amplitude rises above a threshold level and so as to keep the tail current fixed when the signal amplitude is below the threshold.
    Type: Application
    Filed: April 29, 2003
    Publication date: October 30, 2003
    Inventors: Nicholas Paul Cowley, Chi Man Kan, Matthew Aitken