Patents by Inventor Man Keun Kang
Man Keun Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230103255Abstract: A memory includes: a data receiving circuit suitable for receiving a data during a write operation; a data rotation circuit suitable for changing an order of the data transferred from the data receiving circuit and outputting the data whose order is changed in response to an address during the write operation; an error correction code generation circuit suitable for generating an error correction code based on the data output from the data rotation circuit during the write operation; and a memory core suitable for storing the data received by the data receiving circuit and the error correction code during the write operation.Type: ApplicationFiled: December 8, 2022Publication date: March 30, 2023Inventors: Eun Hyup DOH, Man Keun KANG
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Patent number: 11550661Abstract: A memory includes: a data receiving circuit suitable for receiving a data during a write operation; a data rotation circuit suitable for changing an order of the data transferred from the data receiving circuit and outputting the data whose order is changed in response to an address during the write operation; an error correction code generation circuit suitable for generating an error correction code based on the data output from the data rotation circuit during the write operation; and a memory core suitable for storing the data received by the data receiving circuit and the error correction code during the write operation.Type: GrantFiled: May 21, 2021Date of Patent: January 10, 2023Assignee: SK hynix Inc.Inventors: Eun Hyup Doh, Man Keun Kang
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Publication number: 20220229726Abstract: A memory includes: a data receiving circuit suitable for receiving a data during a write operation; a data rotation circuit suitable for changing an order of the data transferred from the data receiving circuit and outputting the data whose order is changed in response to an address during the write operation; an error correction code generation circuit suitable for generating an error correction code based on the data output from the data rotation circuit during the write operation; and a memory core suitable for storing the data received by the data receiving circuit and the error correction code during the write operation.Type: ApplicationFiled: May 21, 2021Publication date: July 21, 2022Inventors: Eun Hyup DOH, Man Keun KANG
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Patent number: 10068632Abstract: A semiconductor system includes a semiconductor device suitable for not performing an internal refresh operation when entering a self-refresh mode in response to a self-refresh command, and cutting off input of an auto-refresh command when exiting the self-refresh mode.Type: GrantFiled: August 22, 2017Date of Patent: September 4, 2018Assignee: SK hynix Inc.Inventors: Geun Ho Choi, Man Keun Kang, Myung Kyun Kwak
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Publication number: 20170352405Abstract: A semiconductor system includes a semiconductor device suitable for not performing an internal refresh operation when entering a self-refresh mode in response to a self-refresh command, and cutting off input of an auto-refresh command when exiting the self-refresh mode.Type: ApplicationFiled: August 22, 2017Publication date: December 7, 2017Applicant: SK hynix Inc.Inventors: Geun Ho CHOI, Man Keun KANG, Myung Kyun KWAK
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Patent number: 9773541Abstract: A semiconductor system includes a semiconductor device suitable for not performing an internal refresh operation when entering a self-refresh mode in response to a self-refresh command, and cutting off input of an auto-refresh command when exiting the self-refresh mode.Type: GrantFiled: July 20, 2016Date of Patent: September 26, 2017Assignee: SK hynix Inc.Inventors: Geun Ho Choi, Man Keun Kang, Myung Kyun Kwak
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Patent number: 9711193Abstract: A driving signal control circuit includes a discharge circuit, a counter circuit, and a control circuit. The discharge circuit is configured to compare a monitored voltage and a reference voltage, and generate a discharge signal. The monitored voltage is proportional to a core voltage. The counter circuit is configured to perform an up/down count operation according to the discharge signal, and generate a count signal. The control circuit is configured to generate a driving signal which has an enable period proportional to the count signal.Type: GrantFiled: December 17, 2015Date of Patent: July 18, 2017Assignee: SK hynix Inc.Inventors: Man Keun Kang, Saeng Hwan Kim
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Patent number: 9672893Abstract: A semiconductor device includes a decoded signal generation circuit suitable for executing a counting operation to generate a decoded signal in response to an oscillation signal during a refresh section, a refresh pulse generation circuit suitable for generating a refresh pulse for executing a refresh operation in response to the decoded signal and a temperature code, and a reset pulse generation circuit suitable for generating a reset pulse initializing the decoded signal in response to the refresh pulse.Type: GrantFiled: February 11, 2016Date of Patent: June 6, 2017Assignee: SK hynix Inc.Inventors: Chul Moon Jung, Mi Hyun Hwang, Man Keun Kang, Sang Kwon Lee
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Publication number: 20170133086Abstract: A semiconductor device includes a decoded signal generation circuit suitable for executing a counting operation to generate a decoded signal in response to an oscillation signal during a refresh section, a refresh pulse generation circuit suitable for generating a refresh pulse for executing a refresh operation in response to the decoded signal and a temperature code, and a reset pulse generation circuit suitable for generating a reset pulse initializing the decoded signal in response to the refresh pulse.Type: ApplicationFiled: February 11, 2016Publication date: May 11, 2017Inventors: Chul Moon JUNG, Mi Hyun HWANG, Man Keun KANG, Sang Kwon LEE
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Publication number: 20170019100Abstract: A driving signal control circuit includes a discharge circuit, a counter circuit, and a control circuit. The discharge circuit is configured to compare a monitored voltage and a reference voltage, and generate a discharge signal. The monitored voltage is proportional to a core voltage. The counter circuit is configured to perform an up/down count operation according to the discharge signal, and generate a count signal. The control circuit is configured to generate a driving signal which has an enable period proportional to the count signal.Type: ApplicationFiled: December 17, 2015Publication date: January 19, 2017Inventors: Man Keun KANG, Saeng Hwan KIM
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Publication number: 20160217846Abstract: A semiconductor device may include a refresh controller and a bank active signal generator. The refresh controller may be suitable for generating a level signal, setting a level of the level signal in response to a refresh pulse signal while operating in a test mode, and suitable for receiving a refresh flag signal and generating a first period signal and a second period signal in response to the level signal. The bank active signal generator may be suitable for generating bank active signals for a first bank group in response to the first period signal, and generating bank active signals for a second bank group in response to the second period signal.Type: ApplicationFiled: May 6, 2015Publication date: July 28, 2016Inventors: Chul Moon JUNG, Man Keun KANG, Mi Hyun HWANG
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Publication number: 20150008970Abstract: A period signal generation circuit includes a first buffer unit suitable for buffering a buffer signal and output an output signal; and a second buffer unit suitable for buffering the output signal and output a period signal, wherein each of the first and second buffer units includes a resistor element coupled between a body of a metal oxide semiconductor (MOS) transistor and a source.Type: ApplicationFiled: December 19, 2013Publication date: January 8, 2015Applicant: SK hynix Inc.Inventor: Man Keun KANG
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Patent number: 8872692Abstract: Provided are a distance measuring device using an impulse signal and a receiving device thereof. The distance measuring device includes: a transmitting device transmitting an impulse signal; and a receiving device receiving the impulse signal and measuring a time interval (hereinafter, referred to as a delay time) between a transmitting timing and a receiving timing of the impulse signal, wherein the receiving device measures the delay time through a Time to Digital Converter (TDC) technique. According to the present invention, the distance measuring device measures the distance accurately and speedly.Type: GrantFiled: September 9, 2011Date of Patent: October 28, 2014Assignee: Industry-Academic Cooperation Foundation, Yonsei UniversityInventors: Tae Wook Kim, Man Keun Kang
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Publication number: 20130176158Abstract: Provided are a distance measuring device using an impulse signal and a receiving device thereof. The distance measuring device includes: a transmitting device transmitting an impulse signal; and a receiving device receiving the impulse signal and measuring a time interval (hereinafter, referred to as a delay time) between a transmitting timing and a receiving timing of the impulse signal, wherein the receiving device measures the delay time through a Time to Digital Converter (TDC) technique. According to the present invention, the distance measuring device measures the distance accurately and speedly.Type: ApplicationFiled: September 9, 2011Publication date: July 11, 2013Applicant: INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITYInventors: Tae Wook Kim, Man Keun Kang