Abstract: Apparatus, method and computer program product are provided for digitally processing an encrypted data stream scrambled, for example, according to content scrambling system (CSS) technology. This digital processing insures against communication of clear data within the computer system from a central processing unit (CPU) to any accessible structure, such as memory or a system bus. Descrambling of the (CSS) scrambled data stream occurs within a module executing on the CPU, which is followed by re-encryption of the data prior to transfer from the CPU. By so processing the data, integrity of copyrighted material is maintained, while allowing for software descrambling of the CSS encrypted data stream. Various techniques for establishing the encryption/decryption algorithm pair employed are described. Decryption of the re-encrypted data can occur at a receiving software module and/or a receiving hardware device, such as a decoder.

Abstract: An MPEG compatible decoder receives encoded, compressed data in the form of image representative pixel blocks. The decoder includes a frame memory (20) for storing reconstructed pixel blocks incident to the decoding process. The previously decompressed data is re-compressed (30) before being written to the memory. Stored decompressed data is decompressed for display (34, 26), or as needed for decoding functions such as motion compensation processing (32, 22). The compression performed before writing data to memory is block-based compression using compressed data from one of two different compression paths (FIG. 3, 314, 320) which compress a given pixel block simultaneously.

Abstract: A television receiver includes an MPEG decoder for providing decoded pixel blocks. Decoded pixels are recompressed prior to storage in frame memory. In the recompression process a reference first pixel is compressed as a function of a pixel block parameter. A reconstructed reference pixel value is used in a prediction network when reconstructing remaining pixels of the pixel block prior to display. A first pixel processor accurately compresses a reference pixel which prevents the propagation of a prediction error throughout the reconstructed block.

Abstract: A television receiver with an MPEG decoder is configurable for full high definition decoding and display, or reduced cost lower definition display. The MPEG decoder (10-33) uses a controllable dual-mode data reduction network selectively employing horizontal detail reduction (29) and data re-compression (30) between the decoder and the decoder frame memory (20) from which image information to be displayed (27) is derived. The amount of data reduction is manufacturer selected in accordance with the resolution of the display device, e.g., equal to or less than high definition resolution. The frame memory size is also manufacturer selected in accordance with the resolution of the display device.

Abstract: A television receiver with an MPEG decoder is configurable for full high definition decoding and display, or reduced cost lower definition display. The MPEG decoder (10-33) uses a controllable dual-mode data reduction network selectively employing horizontal detail reduction (29) and data re-compression (30) between the decoder and the decoder frame memory (20) from which image information to be displayed (27) is derived. The amount of data reduction is manufacturer selected in accordance with the resolution of the display device, e.g., equal to or less than high definition resolution. The frame memory size is also manufacturer selected in accordance with the resolution of the display device.

Abstract: A disclosed method and apparatus reduces the number of computations and simplifies the hardware required to provide compressed video output data. Video input data is converted into input pixel blocks. Best predicted blocks and associated motion vectors are determined for input pixel blocks located in a predetermined area of the image. In addition, candidate predicted blocks are determined for other input pixel blocks. This is done by .extrapolating motion vectors from the previously determined associated motion vectors and identifying candidate predicted blocks using the extrapolated motion vectors. The candidate predicted blocks are mutually compared, and one of the blocks is selected consistent with compression data rate requirements. The selected block is compressed to provide an output block which is formatted into an output data packet.

Abstract: In a video signal processor including a motion compensated predictive coding data compression system, three adjacent image frames (1, 2, 3) are analyzed to detect a luminance gradient such as is typically associated with image fading. The frames are similarly divided into several segments (A . . . L). The sum of the absolute pixel value differences between corresponding segments from adjacent frames is obtained for each of two pairs adjacent frame segments (DIFF.sub.1-2 ; DIFF.sub.2-3). The ratio of the two frame differences (S) is obtained for each segment. Fading is indicated if the ratio remains substantially constant for all or a predetermined number of regions. If fading is detected, any motion vectors generated by the motion coder are assigned a zero value and are not coded.