Patents by Inventor Man Mui

Man Mui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7974134
    Abstract: In a non-volatile memory system, a voltage generator provides a voltage to a gate of a voltage-setting transistor which is used in a sense circuit to set an initial voltage at a sense node. At the end of a sense period, a final voltage of the sense node is compared to a trip point, which is the threshold voltage of a voltage-sensing transistor. To account for temperature variations and manufacturing process variations, the voltage generator includes a transistor which is matched to the voltage-setting transistor, and a transistor which is matched to the voltage-sensing transistor. As a result, a voltage swing between the initial voltage and the trip point is constant, even as the initial voltage and trip point vary. In a particular implementation, the voltage generator uses a cascode current mirror circuit, and receives a reference current from a band gap voltage circuit.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: July 5, 2011
    Assignee: SanDisk Technologies Inc.
    Inventors: Fanglin Zhang, Jong Park, Man Mui, Alexander Chu, Seungpil Lee
  • Patent number: 7974133
    Abstract: A sense amplifier is disclosed. One embodiment is a sensing circuit that includes a sensing device and a sense transistor coupled to the sensing device. A first switch that is coupled to the sense transistor and to the sensing device causes the sensing device to be charged to a first voltage that is a function of the threshold voltage of the sense transistor. One or more second switches that are coupled to the sensing device and to a target element. The second switches couple the sensing device to the target element to modify the first voltage on the sensing device and decouple the target element from the sensing device during a sense phase in which the modified first voltage is applied to the sense transistor. A condition of the target element is determined based on whether or not the sense transistor turns on in response to applying the modified first voltage to the sense transistor.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: July 5, 2011
    Assignee: SanDisk Technologies Inc.
    Inventors: Mohan Vamsi Dunga, Man Mui, Masaaki Higashitani
  • Publication number: 20110116320
    Abstract: In a non-volatile memory system, a voltage generator provides a voltage to a gate of a voltage-setting transistor which is used in a sense circuit to set an initial voltage at a sense node. At the end of a sense period, a final voltage of the sense node is compared to a trip point, which is the threshold voltage of a voltage-sensing transistor. To account for temperature variations and manufacturing process variations, the voltage generator includes a transistor which is matched to the voltage-setting transistor, and a transistor which is matched to the voltage-sensing transistor. As a result, a voltage swing between the initial voltage and the trip point is constant, even as the initial voltage and trip point vary. In a particular implementation, the voltage generator uses a cascode current mirror circuit, and receives a reference current from a band gap voltage circuit.
    Type: Application
    Filed: November 13, 2009
    Publication date: May 19, 2011
    Inventors: Fanglin Zhang, Jong Park, Man Mui, Alexander Chu, Seungpil Lee
  • Publication number: 20110051517
    Abstract: Partial speed and full speed programming are achieved for a non-volatile memory system. During a program operation, in a first time period, bit lines of storage elements to be inhibited are pre-charged, while bit line of storage elements to be programmed at a partial speed and bit lines of storage elements to be programmed at a full speed are fixed. In a second time period, the bit lines of storage elements to be programmed at the partial speed are driven higher, while the bit lines of storage elements to be inhibited are floated and the bit line of storage elements to be programmed remain fixed. In a third time period, the bit lines of storage elements to be inhibited are driven higher while the bit lines of the storage elements to be programmed at the partial speed or the full speed are floated so that they couple higher.
    Type: Application
    Filed: August 25, 2009
    Publication date: March 3, 2011
    Inventors: Man Mui, Yingda Dong, Binh Le, Deepanshu Dutta
  • Publication number: 20100172187
    Abstract: A sense amplifier is disclosed. One embodiment is a sensing circuit that includes a sensing device and a sense transistor coupled to the sensing device. A first switch that is coupled to the sense transistor and to the sensing device causes the sensing device to be charged to a first voltage that is a function of the threshold voltage of the sense transistor. One or more second switches that are coupled to the sensing device and to a target element. The second switches couple the sensing device to the target element to modify the first voltage on the sensing device and decouple the target element from the sensing device during a sense phase in which the modified first voltage is applied to the sense transistor. A condition of the target element is determined based on whether or not the sense transistor turns on in response to applying the modified first voltage to the sense transistor.
    Type: Application
    Filed: January 6, 2009
    Publication date: July 8, 2010
    Inventors: Mohan Vamsi Dunga, Man Mui, Masaaki Higashitani
  • Patent number: 7551477
    Abstract: An array of non-volatile storage elements includes a first group of non-volatile storage elements connected to a selected word line, a second group of non-volatile storage elements connected to the selected word line, a first group of bit lines in communication with the first group of non-volatile storage elements, a second group of bit lines in communication with the second group of non-volatile storage elements, a first set of sense modules located at a first location and connected to the first group of bit lines, and a second set of sense modules located at a second location and connected to the second group of bit lines. The first set of sense modules applies a first bit line voltage based on the bit line distance between the first set of sense modules and the first group of non-volatile storage elements. The second set of sense modules applies a second bit line voltage based on the bit line distance between the second set of sense modules and the second group of non-volatile storage elements.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: June 23, 2009
    Assignee: SanDisk Corporation
    Inventors: Nima Mokhlesi, Dengtao Zhao, Man Mui, Hao Nguyen, Seungpil Lee, Deepak Chandra Sekar, Tapan Samaddar
  • Publication number: 20090080265
    Abstract: An array of non-volatile storage elements includes a first group of non-volatile storage elements connected to a selected word line, a second group of non-volatile storage elements connected to the selected word line, a first group of bit lines in communication with the first group of non-volatile storage elements, a second group of bit lines in communication with the second group of non-volatile storage elements, a first set of sense modules located at a first location and connected to the first group of bit lines, and a second set of sense modules located at a second location and connected to the second group of bit lines. The first set of sense modules applies a first bit line voltage based on the bit line distance between the first set of sense modules and the first group of non-volatile storage elements. The second set of sense modules applies a second bit line voltage based on the bit line distance between the second set of sense modules and the second group of non-volatile storage elements.
    Type: Application
    Filed: September 26, 2007
    Publication date: March 26, 2009
    Inventors: Nima Mokhlesi, Dengtao Zhao, Man Mui, Hao Nguyen, Seungpil Lee, Deepak Chandra Sekar, Tapan Samaddar
  • Patent number: 7368979
    Abstract: According to different embodiments of the present invention, various methods, devices and systems are described for managing power in charge pumps in a non-volatile memory system having a high voltage charge pump and associated regulator. A method includes the following operations, receiving an operation command corresponding to an operation, pumping up a charge pump output voltage to a desired output voltage, turning off the regulator and the charge pump when the output voltage is approximately the desired output voltage compensating for charge sharing by turning on the charge pump and setting a pump clock rate to a slow clock rate in order to avoid overshooting the desired output voltage by the charge pump while the operation is being carried out, and compensating for junction leakage by turning on the regulator and the charge pump until the charge pump output voltage is the desired output voltage.
    Type: Grant
    Filed: September 19, 2006
    Date of Patent: May 6, 2008
    Assignee: SanDisk Corporation
    Inventors: Prashanti Govindu, Feng Pan, Man Mui, Gyuwan Kwon, Trung Pham, Chi-Ming Wang
  • Publication number: 20080068067
    Abstract: According to different embodiments of the present invention, various methods, devices and systems are described for managing power in charge pumps in a non-volatile memory system having a high voltage charge pump and associated regulator. A method includes the following operations, receiving an operation command corresponding to an operation, pumping up a charge pump output voltage to a desired output voltage, turning off the regulator and the charge pump when the output voltage is approximately the desired output voltage compensating for charge sharing by turning on the charge pump and setting a pump clock rate to a slow clock rate in order to avoid overshooting the desired output voltage by the charge pump while the operation is being carried out, and compensating for junction leakage by turning on the regulator and the charge pump until the charge pump output voltage is the desired output voltage.
    Type: Application
    Filed: September 19, 2006
    Publication date: March 20, 2008
    Inventors: Prashanti Govindu, Feng Pan, Man Mui, Gyuwan Kwon, Trung Pham, Chi-Ming Wang