Abstract: This invention relates to a method for preparing a sucrose-6-ester.

Abstract: An auto-focusing zoom lens mechanism includes a base unit forming a space; an auto-focusing (AF) lens unit located in the base unit and having a trajectory bar engaged therewith; a zoom lens unit located in the base unit and mounted on the AF lens unit and having a trajectory bar engaged therewith; a cam plate unit engaged with the AF lens unit and the zoom lens unit and provided with an AF trajectory groove and a zoom trajectory groove to receive the trajectory bars of the AF lens unit and the zoom lens unit; and a step motor unit engaged with the cam plate unit to drive the cam plate unit, the AF lens unit and the zoom lens unit moving.

Abstract: The described embodiments relate to the general area of Field Programmable Gate Arrays (FPGAs), and, in particular, to the architecture and the structure of the building blocks of the FPGAs. Proposed logic units, as separate units or a chain of units, which are mainly comprised of look-up tables, multiplexers, and latches, implement different mathematical and logical functions. Having two outputs, the embodiments of the logic unit can operate in a split mode and perform two separate logic and/or arithmetic functions at the same time. Chains of the proposed logic units, wherein every other unit is clocked by one of the two half clock cycles and utilizes local interconnections instead of traditional routing channels, add to efficiency and speed, and reduce required real estate.

Abstract: The described embodiments relate to the general area of Field Programmable Gate Arrays (FPGAs), and, in particular, to the architecture and the structure of the building blocks of the FPGAs. Proposed logic units, as separate units or a chain of units, which are mainly comprised of look-up tables, multiplexers, and latches, implement different mathematical and logical functions. Having two outputs, the embodiments of the logic unit can operate in a split mode and perform two separate logic and/or arithmetic functions at the same time. Chains of the proposed logic units, wherein every other unit is clocked by one of the two half clock cycles and utilizes local interconnections instead of traditional routing channels, add to efficiency and speed, and reduce required real estate.

Abstract: A method and an apparatus provide a service of multimedia data in a mobile terminal. In the method and the apparatus, a package data is generated and stored at a multimedia data providing device. The package data includes an execution condition and a multimedia file corresponding to the execution condition, wherein the multimedia file executes in the mobile terminal when the execution condition is satisfied. When the mobile terminal accesses the multimedia data providing device and requests the multimedia data, the package data including the multimedia data is transmitted to the mobile terminal through communication network. According to the method and the apparatus, the mobile terminal is simply provided various multimedia services.

Abstract: A field programmable gate array (FPGA) having hierarchical interconnect structure is disclosed. The FPGA includes logic heads that have signals routed therebetween by the interconnect structure. Each logic head includes a plurality of cascadable logic blocks that can perform combinatorial logic. The logic head can further be fractured into two independent logical units.

Abstract: A zoom lens barrel includes a first stationary cylinder defining an optical axis. The first stationary cylinder has a tubular wall surrounding a passage. A guiding and positioning slot is defined in the tubular wall along the optical axis with a plurality of anchor points and block points alternately arranged on edges thereof. A first lens carrier is held in the passage and has a driving pole. A second lens carrier surrounds the tubular wall and has a retainer and a first guiding slot. A second stationary cylinder surrounds the second lens carrier and has a stopper and a second guiding slot. The driving pole passes through the guiding and positioning slot, the first and the second guiding slot and is positioned in one of the anchor points. The spring is retained between the first stationary cylinder and the second lens carrier to push the second lens carrier moving with the first lens carrier till the retainer is blocked by the stopper.

Abstract: A field programmable gate array (FPGA) having hierarchical interconnect structure is disclosed. The FPGA includes logic heads that have signals routed therebetween by the interconnect structure. Each logic head includes a plurality of cascadable logic blocks that can perform combinatorial logic. The logic head can further be fractured into two independent logical units.

Abstract: A field programmable gate array (FPGA) having hierarchical interconnect structure is disclosed. The FPGA includes logic heads that have signals routed therebetween by the interconnect structure. Each logic head includes a plurality of cascadable logic blocks that can perform combinatorial logic. The logic head can further be fractured into two independent logical units.

Abstract: The embodiments of the present invention relate to the general area of the Field Programmable Gate Arrays, and, in particular to the architecture and the structure of the building blocks of the Field Programmable Gate Arrays. The proposed logic units, as separate units or cluster of units, which are mainly comprised of look-up tables, multiplexers, and a latch, implement functions such as addition, subtraction, multiplication, and can perform as shift registers, finite state machines, multiplexers, accumulators, counters, multi-level random logic, and look-up tables, among other functions. Having two outputs, the embodiments of the logic unit can operate in split-mode and perform two separate logic and/or arithmetic functions at the same time. Clusters of the proposed logic units, which utilize local interconnections instead of traditional routing channels, add to efficiency, speed, and reduce required real estate.

Abstract: The present invention relates to the general area of the Field Programmable Gate Arrays, and, in particular to the architecture and the structure of the building blocks of the Field Programmable Gate Arrays. The proposed logic cells offer, among other advantages, by-pass and feedback paths, fewer transistors, no need for dedicated carry logic or multiple registers, 3-input instead of 4-input look-up tables, easy implementation of up to 4-input logic functions, and multiplication.

Abstract: A field programmable gate array (FPGA) having hierarchical interconnect structure is disclosed. The FPGA includes logic heads that have signals routed therebetween by the interconnect structure. Each logic head includes a plurality of cascadable logic blocks that can perform combinatorial logic. The logic head can further be fractured into two independent logical units.

Abstract: A field programmable gate array (FPGA) having hierarchical interconnect structure is disclosed. The FPGA includes logic heads that have signals routed therebetween by the interconnect structure. Each logic head includes a plurality of cascadable logic blocks that can perform combinatorial logic. The logic head can further be fractured into two independent logical units.

Abstract: A field programmable gate array (FPGA) having hierarchical interconnect structure is disclosed. The FPGA includes logic heads that have signals routed therebetween by the interconnect structure. Each logic head includes a plurality of cascadable logic blocks that can perform combinatorial logic. The logic head can further be fractured into two independent logical units.

Abstract: The present invention is to provide a nailing depth adjusting and positioning device for a power nailer in order to protect the distal thread and stabilize the operation. The device having a circular groove formed in a rotatable member and a retainer ring located in a link in order to prevent the rotatable member from being overly rotated (to protect the distal thread), and the disengagement of the device, and having a steel ball and a spring mounted in the rotatable member, the steel ball cooperates with the several gaps in the safety device to locate the rotatable member, such that the starting distance of the device may stably be adjusted. Thereby, the depth of nailing and the position may be successively maintained.