Abstract: A technique non-disruptively recovers from a processor failure in a multi-processor flow device, such as an intermediate network node of a computer network. Data relating to a particular data flow of a processor within the node is tagged with specific information used to detect and recover from a failure of the processor without affecting data from other processors of the node. A data path management device tags the data with the specific information reflecting the processor issuing the data and a state of the processor. When the tagged data subsequently passes through the data path management device, the specific information is compared with current information for the issuing processor. If the comparison indicates that the specific information is valid, the data path management device forwards the related data flow through the node. If the comparison indicates that the specific information is invalid, the data and its related data flow are discarded and “cleanly” purged from the node.

Abstract: The present invention comprises a technique for performing a reassembly assist function that enables a processor to perform packet reassembly in a deterministic manner. The technique employed by the present invention enables a processor to reassemble a packet without having to extend its normal processing time to reassemble a varying number of fragments into a packet. The invention takes advantage of the fact that the reassembly assist can be dedicated exclusively to reassembling a packet from a series of fragments and thereby offloading the reassembly process from the processor.

Abstract: A compressor system includes a compressor having an inlet, a first conduit fluidly coupled to the inlet, an accumulator fluidly coupled to the inlet by a second conduit, and a first valve disposed in the second conduit that prevents fluid communication between the accumulator and the inlet in a closed state and permits fluid communication between the accumulator and the inlet in an open state.

Abstract: A heat pump system includes a first heat exchanger, a second heat exchanger in fluid communication with the first heat exchanger, a scroll compressor in fluid communication with each of the first and second heat exchangers, and a flash tank in fluid communication with each of the first and second heat exchangers and the scroll compressor. The flash tank includes an inlet fluidly coupled to the first and second heat exchangers and receives liquid refrigerant from the first and second heat exchangers. The flash tank also includes a first outlet fluidly coupled to the first and second heat exchangers that delivers sub-cooled-liquid refrigerant to the second heat exchanger and a second outlet fluidly coupled to the scroll compressor that delivers vaporized refrigerant to the scroll compressor in a heating mode.

Abstract: A heat pump system includes a first heat exchanger, a second heat exchanger in fluid communication with the first heat exchanger, a scroll compressor in fluid communication with each of the first and second heat exchangers, and a flash tank in fluid communication with each of the first and second heat exchangers and the scroll compressor. A first capillary tube is disposed between the first heat exchanger and an inlet of the flash tank and a first valve is disposed between the first heat exchanger and the first capillary tube to control refrigerant to the first capillary tube.

Abstract: The present invention provides a technique for ordering responses received over a split transaction bus, such as a HyperTransport bus (HPT). When multiple non-posted requests are sequentially issued over the split transaction bus, control logic is used to assign each request an identifying (ID) number, e.g. up to a maximum number of outstanding requests. Similarly, each response received over the split transaction bus is assigned the same ID number as its corresponding request. Accordingly, a “response memory” comprises a unique memory block for every possible ID number, and the control logic directs a received response to its corresponding memory block. The responses are extracted from blocks of response memory in accordance with a predetermined set of ordering rules. For example, the responses may be accessed in the same order the corresponding non-posted requests were issued.

Abstract: The present invention comprises a scheduling assist function (scheduling assist) that enables a processor to schedule events and be notified when these events expire. In addition, the present invention includes features that enable a processor to associate these events with output channels and enable the processor to quickly locate output channels (links) that are available and ready to be serviced. The invention takes advantage of the fact that the scheduling assist can be dedicated exclusively to scanning tables in its own dedicated memories looking for events that have expired and/or output channels that are available and not involve the processor in the search for output channels that are available and ready to be serviced.

Abstract: An electrical switch for switching on and off an electrical appliance such as a light bulb. The switch includes a body, a fixed contact and a movable contact, an actuator supported by the body for pivotal movement, causing movement of the movable contact between a switched-on position and a switched-off position, and an internal spring acting upon the actuator. The spring extends generally in-line with the actuator, in compression, such that the actuator and spring are pivotable rapidly and simultaneously in opposite directions through an over-centre action about an unstable central position. The body may include a lamp socket for receiving the light bulb.