Patents by Inventor Manabu Ando

Manabu Ando has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4956944
    Abstract: A polishing apparatus for polishing a surface of a work piece requiring high surface precision such as an optical component or a metal mold by applying a tool, in which the tool is given a rocking motion of the surface of work to be polished while the work is given a rotary motion. Besides the rotary motion of the work, the rotation and rocking motion of the tool and the movement of the tool on the surface to be polished are detected and are controlled according to the working information for the surface to be polished.
    Type: Grant
    Filed: August 29, 1989
    Date of Patent: September 18, 1990
    Assignee: Canon Kabushiki Kaisha
    Inventors: Manabu Ando, Nobuo Nakamura, Yoshitane Tsuchiya, Hirotaka Fuse, Kazuo Watanabe, Koushi Shinoda
  • Patent number: 4876974
    Abstract: A presser foot assembly in a sewing machine essentially comprising a presser foot having a catch pin plateau integrally connected to its cambered press plate and a holder which is adapted to be fixed to the body of the sewing machine. The holder has a curved front extension, and this curved front extension has a lateral and longitudinal slot in its bottom to snugly accommodate the catch pin plateau of the press plate, permitting the free inclination of the presser foot about its pivot within so controlled limits that the needle cannot come to contact to the edge of the needle aperture of the press plate.
    Type: Grant
    Filed: December 22, 1988
    Date of Patent: October 31, 1989
    Assignee: Kohshin Seimitsu Kikai Kabushiki Gaisha
    Inventor: Manabu Ando
  • Patent number: 4717846
    Abstract: An output circuit protected by an abnormal voltage supplied at an output terminal is disclosed. The output circuit comprises a first switching circuit includes first and second transistors connected in series for providing an output terminal with a first potential therethrough in response to a first logic state of a logic signal, a second switching circuit for providing the output terminal with a second potential in response to a second logic state of the logic signal, and means for making the first and second transistors non-conducting when the first switching circuit is disenabled.
    Type: Grant
    Filed: September 25, 1986
    Date of Patent: January 5, 1988
    Assignee: Nippon Electric Co. Ltd.
    Inventor: Manabu Ando
  • Patent number: 4707809
    Abstract: A semiconductor memory device in which the selected word line is energized only during a limited period of time is disclosed. The memory device is equipped with a clock generator which generates a one-shot pulse signal in response to a change in address signal or to an application of a write-enable signal, and the selected word line is energized by the one-shot clock signal. The clock generator further generates a one-shot clock signal in response to a change in an input data signal in a data-write operation. The input data is thereby sorted into the accessed memory cell, even when the data to be stored is supplied a relatively long time after the write-enable signal is applied.
    Type: Grant
    Filed: July 12, 1985
    Date of Patent: November 17, 1987
    Assignee: NEC Corporation
    Inventor: Manabu Ando
  • Patent number: 4701889
    Abstract: A static semiconductor memory device includes a memory cell matrix having word and digit lines connected to memory cells, an X address decoder connected to the word lines, a gate circuit connected to the digit lines, a Y address decoder connected to a gate of the gate circuit, a sense amplifier connected to an output of the gate circuit, a latching circuit connected to an output of the sense amplifier, and an internal control circuit for supplying control signals to the above components. The internal control circuit controls so as to activate the X address decoder and the sense amplifier, precharge the latching circuit, supply a select signal representing an updated address to the selected word and digit lines, cause the latching circuit to latch a signal appearing across the digit line, and deactivate the X address decoder and the sense amplifier.
    Type: Grant
    Filed: May 23, 1985
    Date of Patent: October 20, 1987
    Assignee: NEC Corporation
    Inventor: Manabu Ando
  • Patent number: 4611134
    Abstract: A driving circuit which can operates stably without being affected by noise or the like is disclosed.
    Type: Grant
    Filed: July 28, 1983
    Date of Patent: September 9, 1986
    Assignee: NEC Corporation
    Inventor: Manabu Ando