Abstract: A partition structure of a power train device is provided with: a second differential coupled with an external first differential so as to receive a driving force input to the first differential; a case having a first end facing to the first differential, a second end opposed to the first end and a wall defining the case, the case rotatably housing the second differential and an oil for lubrication of the second differential; and a seal member disposed at the first end of the case and between the first differential and the second differential so as to prevent the oil in the case from mixing with an external fluid existing outside with respect to the case and the seal member.

Abstract: A partition structure of a power train device is provided with: a second differential coupled with an external first differential so as to receive a driving force input to the first differential; a case having a first end facing to the first differential, a second end opposed to the first end and a wall defining the case, the case rotatably housing the second differential and an oil for lubrication of the second differential; and a seal member disposed at the first end of the case and between the first differential and the second differential so as to prevent the oil in the case from mixing with an external fluid existing outside with respect to the case and the seal member.

Abstract: An LED (light emitting diode) array of the present invention has a plurality of light emitting diodes aligned in row on a substrate crystal. Each of the light emitting diodes has a double hetero-structure formed by causing a light emitting layer to be interposed between p-type and n-type semi-conductive layers and is isolated with isolating mesa grooves. A reflecting layer is provided between the substrate crystal and one of the p-type and n-type semi-conductive layers. The reflecting layer comprises a plurality of semi-conductive layers having at least different refractive indexes of 2 or more than 2-kinds, each of the semi-conductive layers made of semiconductor having the same polarity as that of the substrate crystal and having a wider forbidden band width than that of the light emitting layer. Further, the isolating mesa grooves are provided by a wet etching using an etching liquid of H.sub.3 PO.sub.4 .multidot.H.sub.2 O.sub.2 having volume ratio of H.sub.3 PO.sub.4 : H.sub.2 O.sub.2 =1.about.

Abstract: In a field effect transistor (JFET) having a compound semiconducting substrate, a buffer layer having a guard-ring, an active layer, source regions, drain regions, and gate regions, the guard-ring is separated from the active layer whereby gate junction capacitance and gate leakage current are lowered without raising a gate resistance value. As a result, noise characteristics and high frequency characteristics can be improved.