Abstract: In order to carry out a diagnostic operation after packaging process, there is disclosed a semi-custom-made integrated circuit device fabricated on a semiconductor substrate, comprising a plurality of function blocks each achieving a predetermined function and internal bus system operative to couple the function blocks, and one of the function blocks comprises a control signal generating circuit responsive to external control signals fed from the outside and operative to produce a plurality of internal control signals representing respective commands used for a diagnostic operation carried out on the basis of data information supplied from the outside of the semi-custom-made integrated circuit, so that the diagnostic operation can be carried out after packaging process with a set of information data commonly used among a plural-type of semi-custom-made integrated circuit device.

Abstract: A microcomputer includes an instruction execution unit and an internal memory formed on the same chip. A first circuit is provided for setting a memory access cycle for a read/write to the internal memory shorter than that for read/write to an external memory. Further, a second circuit is provided for setting the memory access cycle for the read/write to the internal memory substantially equal to that for the read/write to the external memory. The first and second setting circuits are alternatively and selectively activated.

Abstract: An information processing system has a bus for providing information transmission, which is received at an external terminal. An input/output circuit is coupled between the bus and the external terminal for effecting the information transmission therebetween. A first control signal controls the timing of the input/output circuit so that the information may be transmitted from the bus to the external terminal. A second control signal controls the timing of the input/output means so that the information may be transmitted to the bus. A third control signal has a timing which is different from both the first and the second control signals so that the information may be transmitted through the input/output circuit. Timing control means selectively applies the first or second control signal and then the input/output circuit operates in accordance with the third control signal.

Abstract: An information handling apparatus comprises a memory storing a group of instructions. A memory location is designated where the instruction is to be read out of the memory. After a predetermined instruction has been read out, a signal is generated for inhibiting an execution of at least one subsequently scheduled instruction. After a short period of time, an address for a next new instruction is prepared. The new instruction is then read out in response to the prepared address. The instructions are regulated so that, although at least one portion of the instruction is read out of the memory by memory accessing, the processing defined by the instruction is not immediately executed. Typically, one such instruction may be followed by an instruction to subsequently skip an instruction.

Abstract: In a data processing apparatus comprising a data transmitting and receiving unit for transferring data and a processing unit for processing the data, means is provided for stopping supply of a control clock signal to circuit elements which are in an inoperative state.