Abstract: A low-pass filter includes first and second input/output ports, first and second LC parallel resonators connected in series and provided between the first and second input/output ports, and first to third paths. The first path includes a first LC series resonator and connects a first end of the first LC parallel resonator closest to the first input/output port to a ground. The second path includes a second LC series resonator and connects a second end of the second LC parallel resonator closest to the second input/output port to the ground. The third path includes a third-path capacitor and connects a connection point between the first and second LC parallel resonators to the ground.

Abstract: A multilayer filter includes an element body formed by stacking a plurality of insulator layers, and an input terminal, a first output terminal, and a ground terminal arranged on outer surfaces of the element body, a first LC resonance circuit provided in a line connecting the input terminal to the first output terminal and including a first inductor and a first capacitor, and an open inductor having one end connected to the ground terminal and the other end open are provided in the element body, and the open inductor is arranged to face the first output terminal or the first inductor.

Abstract: A low-pass filter includes first and second input/output ports, first and second LC parallel resonators connected in series and provided between the first and second input/output ports, and first to third paths. The first path includes a first LC series resonator and connects a first end of the first LC parallel resonator closest to the first input/output port to a ground. The second path includes a second LC series resonator and connects a second end of the second LC parallel resonator closest to the second input/output port to the ground. The third path includes a third-path capacitor and connects a connection point between the first and second LC parallel resonators to the ground.

Abstract: A multilayer filter (1) includes an element body (2) formed by stacking a plurality of insulator layers (10), and an input terminal TIN (5), a first output terminal TOUT1 (9), and a ground terminal G (4, 8) arranged on outer surfaces of the element body (2), a first LC resonance circuit (RC2) provided in a line (S1) connecting the input terminal TIN (5) to the first output terminal TOUT1 (9) and including a first inductor (L2) and a first capacitor (C2), and an open inductor (LOPEN) having one end connected to the ground terminal (G) and the other end open are provided in the element body (2), and the open inductor (LOPEN) is arranged to face the first output terminal TOUT1 (9) or the first inductor (L2).

Abstract: A multilayer electronic component includes a stack and a balun. The stack includes a plurality of stacked dielectric layers and conductor layers. The balun is formed using the stack. The balun includes an unbalanced transmission line and first to fourth balanced transmission lines. The unbalanced transmission line includes a first line portion and a second line portion connected in series. The first and second balanced transmission lines are configured to be electromagnetically coupled to the first line portion. The third and fourth balanced transmission lines are configured to be electromagnetically coupled to the second line portion.

Abstract: A branching filter includes a first filter provided between a common port and a first signal port, and a second filter provided between the common port and a second signal port. The branching filter further includes a connection path and a first capacitor. The connection path includes a first inductor, and connects the common port and the first filter. The first capacitor is provided between the connection path and the ground. The second filter is connected to the connection path. The first capacitor is connected to the first inductor at a first branch point located at any position in the first inductor.

Abstract: A multilayer electronic component includes a stack and a balun. The stack includes a plurality of stacked dielectric layers and conductor layers. The balun is formed using the stack. The balun includes an unbalanced transmission line and first to fourth balanced transmission lines. The unbalanced transmission line includes a first line portion and a second line portion connected in series. The first and second balanced transmission lines are configured to be electromagnetically coupled to the first line portion. The third and fourth balanced transmission lines are configured to be electromagnetically coupled to the second line portion.

Abstract: An antenna device includes an antenna element 10 and a printed circuit board 20 on which the antenna element 10 is mounted. The antenna element 10 includes a base 11 which is made of a dielectric material and a radiation conductor formed on at least one surface of the base 11. The printed circuit board 20 includes ground clearance region 23a having substantially a rectangular shape and having one side contacting an edge of the printed circuit board and other three sides surrounded by an edge line of a ground pattern, an antenna mounting region 27 provided within the ground clearance region 23a, and at least one frequency adjusting element 30 provided within the ground clearance region 27. The frequency adjusting element 30 is provided on the far side of the antenna mounting region 27 as viewed from an edge 20e of the printed circuit board 20.

Abstract: An antenna device includes an antenna element 10 and a printed circuit board 20 on which the antenna element 10 is mounted. The antenna element 10 includes a base 11 which is made of a dielectric material and a radiation conductor formed on at least one surface of the base 11. The printed circuit board 20 includes ground clearance region 23a having substantially a rectangular shape and having one side contacting an edge of the printed circuit board and other three sides surrounded by an edge line of a ground pattern, an antenna mounting region 27 provided within the ground clearance region 23a, and at least one frequency adjusting element 30 provided within the ground clearance region 27. The frequency adjusting element 30 is provided on the far side of the antenna mounting region 27 as viewed from an edge 20e of the printed circuit board 20.