Patents by Inventor Manabu Kuroda

Manabu Kuroda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11833192
    Abstract: A method for improving intestinal flora increases the number of beneficial bacteria such as lactic acid bacteria and Bifidobacterium to improve intestinal flora by using an enzyme. The method involves providing a protease, which is a polypeptide having an amino acid sequence shown in SEQ ID NO: 1 that can increase beneficial bacteria such as lactic acid bacteria and Bifidobacterium in intestines to exert an excellent effect of improving intestinal flora.
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: December 5, 2023
    Assignees: AMANO ENZYME INC., HIROSHIMA UNIVERSITY
    Inventors: Manabu Kuroda, Shotaro Yamaguchi, Norihisa Kato
  • Patent number: 11517613
    Abstract: A lactase bulk powder and a lactase preparation both have improved storage stability. The stability of a lactase bulk powder is improved by regulating the acceptable amount of glucose and/or galactose, generated during manufacturing the lactase bulk powder, within a preset range. The lactase bulk powder includes lactase, galactose and/or glucose. The total amount of galactose and glucose is more than 0 ?mol and not more than 50 ?mol per 100,000 U of lactase. The lactase preparation has the lactase bulk powder as an active ingredient.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: December 6, 2022
    Assignee: AMANO ENZYME INC.
    Inventors: Manabu Kuroda, Masayuki Hojo
  • Publication number: 20220023396
    Abstract: A method for improving intestinal flora increases the number of beneficial bacteria such as lactic acid bacteria and Bifidobacterium to improve intestinal flora by using an enzyme. The method involves providing a protease, which is a polypeptide having an amino acid sequence shown in SEQ ID NO: 1 that can increase beneficial bacteria such as lactic acid bacteria and Bifidobacterium in intestines to exert an excellent effect of improving intestinal flora.
    Type: Application
    Filed: October 5, 2021
    Publication date: January 27, 2022
    Inventors: Manabu KURODA, Shotaro YAMAGUCHI, Norihisa KATO
  • Patent number: 11167016
    Abstract: The purpose of the present invention is to provide an agent for improving intestinal flora which can increase the number of beneficial bacteria such as lactic acid bacteria and Bifidobacterium to improve intestinal flora by using an enzyme. A protease consisting of a polypeptide having an amino acid sequence shown in SEQ ID NO: 1 can increase beneficial bacteria such as lactic acid bacteria and Bifidobacterium in intestines to exert an excellent effect of improving intestinal flora.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: November 9, 2021
    Assignees: AMANOENZYME INC., HIROSHIMA UNIVERSITY
    Inventors: Manabu Kuroda, Shotaro Yamaguchi, Norihisa Kato
  • Patent number: 11123410
    Abstract: The purpose of the present invention is to provide an agent for improving intestinal flora which can increase the number of beneficial bacteria such as lactic acid bacteria and Bifidobacterium to improve intestinal flora by using an enzyme. An amylase that is derived from a microorganism belonging to Aspergillus can increase beneficial bacteria such as lactic acid bacteria and Bifidobacterium in intestines to exert an excellent effect of improving intestinal flora.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: September 21, 2021
    Assignees: AMANZO ENZYME INC., HIROSHIMA UNIVERSITY
    Inventors: Manabu Kuroda, Shotaro Yamaguchi, Norihisa Kato
  • Publication number: 20210145942
    Abstract: A lactase bulk powder and a lactase preparation both have improved storage stability. The stability of a lactase bulk powder is improved by regulating the acceptable amount of glucose and/or galactose, generated during manufacturing the lactase bulk powder, within a preset range. The lactase bulk powder includes lactase, galactose and/or glucose. The total amount of galactose and glucose is more than 0 ?mol and not more than 50 ?mol per 100,000 U of lactase. The lactase preparation has the lactase bulk powder as an active ingredient.
    Type: Application
    Filed: May 31, 2018
    Publication date: May 20, 2021
    Inventors: Manabu KURODA, Masayuki HOJO
  • Publication number: 20200312637
    Abstract: A plasma processing apparatus includes a processing chamber, a mounting table, a supporting shaft unit, a high frequency power supply and a high frequency shield. The mounting table mounts thereon a processing target in the processing chamber. The supporting shaft unit supports the mounting table from an opposite surface of a substrate mounting surface, has a protruding part that protrudes to the outside while penetrating through a wall of the processing chamber, and is connected to a rotation mechanism that rotates the mounting table about an axis. The high frequency power supply supplies a high frequency power for plasma processing. The high frequency shield covers the protruding part of the supporting shaft unit to suppress leakage of the high frequency power to the outside. The module unit is entirely detachable to divide each of the supporting shaft unit and the high frequency shield into parts in a longitudinal direction.
    Type: Application
    Filed: March 20, 2020
    Publication date: October 1, 2020
    Inventors: Kazuhiro OOYA, Manabu KURODA
  • Publication number: 20190105376
    Abstract: The purpose of the present invention is to provide an agent for improving intestinal flora which can increase the number of beneficial bacteria such as lactic acid bacteria and Bifidobacterium to improve intestinal flora by using an enzyme. A protease consisting of a polypeptide having an amino acid sequence shown in SEQ ID NO: 1 can increase beneficial bacteria such as lactic acid bacteria and Bifidobacterium in intestines to exert an excellent effect of improving intestinal flora.
    Type: Application
    Filed: February 17, 2017
    Publication date: April 11, 2019
    Inventors: Manabu KURODA, Shotaro YAMAGUCHI, Norihisa KATO
  • Publication number: 20190091301
    Abstract: The purpose of the present invention is to provide an agent for improving intestinal flora which can increase the number of beneficial bacteria such as lactic acid bacteria and Bifidobacterium to improve intestinal flora by using an enzyme. An amylase that is derived from a microorganism belonging to Aspergillus can increase beneficial bacteria such as lactic acid bacteria and Bifidobacterium in intestines to exert an excellent effect of improving intestinal flora.
    Type: Application
    Filed: February 17, 2017
    Publication date: March 28, 2019
    Inventors: Manabu KURODA, Shotaro YAMAGUCHI, Norihisa KATO
  • Patent number: 9361259
    Abstract: An integrated circuit for video/audio processing in which design resources obtained by development of video/audio devices can also be used for other types of video/audio devices. The integrated circuit includes a microcomputer that includes a CPU, a stream input/output for inputting/outputting a video and audio stream to and from an external device, a media processor that executes the media processing including at least one of compressing and decompressing the video and audio stream inputted to the stream input/output, an AV input/output that converts the video and audio stream subjected to the media processing by the media processor into video and audio signals and outputting these signals to the external device. A memory interface controls a data transfer between the microcomputer, the stream input/output, the media processor and the AV input/output and an external memory.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: June 7, 2016
    Assignee: SOCIONEXT INC.
    Inventors: Kozo Kimura, Tokuzo Kiyohara, Hiroshi Mizuno, Junji Michiyama, Tomohiko Kitamura, Ryoji Yamaguchi, Manabu Kuroda, Nobuhiko Yamada, Hideyuki Ohgose, Akifumi Yamana
  • Publication number: 20140310442
    Abstract: An integrated circuit for video/audio processing in which design resources obtained by development of video/audio devices can also be used for other types of video/audio devices. The integrated circuit includes a microcomputer that includes a CPU, a stream input/output for inputting/outputting a video and audio stream to and from an external device, a media processor that executes the media processing including at least one of compressing and decompressing the video and audio stream inputted to the stream input/output, an AV input/output that converts the video and audio stream subjected to the media processing by the media processor into video and audio signals and outputting these signals to the external device. A memory interface controls a data transfer between the microcomputer, the stream input/output, the media processor and the AV input/output and an external memory.
    Type: Application
    Filed: June 25, 2014
    Publication date: October 16, 2014
    Inventors: Kozo KIMURA, Tokuzo KIYOHARA, Hiroshi MIZUNO, Junji MICHIYAMA, Tomohiko KITAMURA, Ryoji YAMAGUCHI, Manabu KURODA, Nobuhiko YAMADA, Hideyuki OHGOSE, Akifumi YAMANA
  • Patent number: 8811470
    Abstract: An integrated circuit for video/audio processing in which design resources obtained by development of video/audio devices can also be used for other types of video/audio devices. The integrated circuit includes a microcomputer that includes a CPU, a stream input/output for inputting/outputting a video and audio stream to and from an external device, a media processor that executes the media processing including at least one compressing and decompressing the video and audio stream inputted to the stream input/output, an AV input/output that converts the video and audio stream subjected to the media processing by the media processor into video and audio signals and outputting these signals to the external device. A memory interface controls a data transfer between the microcomputer, the stream input/output, the media processor and the AV input/output and an external memory.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: August 19, 2014
    Assignee: Panasonic Corporation
    Inventors: Kozo Kimura, Tokuzo Kiyohara, Hiroshi Mizuno, Junji Michiyama, Tomohiko Kitamura, Ryoji Yamaguchi, Manabu Kuroda, Nobuhiko Yamada, Hideyuki Ohgose, Akifumi Yamana
  • Publication number: 20130318544
    Abstract: A program generation device for generating, from a source program, machine programs corresponding to a plurality of processors having different instruction sets and sharing a memory, the program generation device including: a switch point determination unit for determining a switch point in the source program; a switchable-program generation unit for generating a switchable program for each processor so that a data structure of the memory is commonly shared at a switch point among the plurality of processors; and a switch decision process insertion unit for inserting into the switchable programs a switch program for stopping at the switch point a switchable program being executed by and corresponding to a first processor, and causing a second processor to execute, from the switch point, a switchable program corresponding to the second processor.
    Type: Application
    Filed: July 29, 2013
    Publication date: November 28, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Manabu KURODA, Yoshihiro KOGA, Kunihiko HAYASHI, Kouji NAKAJIMA
  • Patent number: 8094725
    Abstract: A coding section encodes plural pieces of video data sequentially. A measuring section measures a time period which the coding section has used for coding video data. When the time period measured by the measuring section is judged to be longer than a predetermined time based on a frame rate of the video data, a control section selects at least one piece of video data to be coded after the video data coded by the coding section out of the plural pieces of video data and generates a predetermined bit stream instead of coded data of the thus selected video data without allowing the coding section to encode the selected data.
    Type: Grant
    Filed: September 6, 2006
    Date of Patent: January 10, 2012
    Assignee: Panasonic Corporation
    Inventors: Yoshihiro Nakahara, Keisuke Yorioka, Manabu Kuroda, Masakazu Kanda
  • Patent number: 7884882
    Abstract: An address generating unit 102 generates a different write start address (w_adr) of a picture memory 105 depending on an aspect ratio and/or a display plane position of a motion picture to be displayed. A picture writing unit 104 writes data to the picture memory 105, starting at the calculated write start address (w_adr). A picture reading unit 108 uses the write start address (w_adr) as a read start address (r_adr) and reads data from the picture memory 105, starting at the read start address (r_adr).
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: February 8, 2011
    Assignee: Panasonic Corporation
    Inventors: Keisuke Yorioka, Yoshihiro Nakahara, Kouji Nakajima, Manabu Kuroda
  • Patent number: 7584312
    Abstract: A data processing apparatus stops a supply of data to a buffer when the buffer becomes full, and thereafter performs processing such as moving to a low-power mode and switching execution tasks. The data processing apparatus then reverts from the low-power mode and resumes execution of a task for supplying data to the buffer when a predetermined reversion condition is satisfied. The predetermined reversion condition is that, for example, processing with respect to data in a predetermined data cluster is completed, a predetermined time period has elapsed, or a cycle handler notifies an event occurrence.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: September 1, 2009
    Assignee: Panasonic Corporation
    Inventors: Manabu Kuroda, Osamu Furuya
  • Publication number: 20090110364
    Abstract: In reproducing a stream containing video and audio, an audio decoder section decodes audio frames separated from the stream, and a video decoder section decodes video frames separated from the stream. Decoded audio data and video data are reproduced by an audio reproduction section and by a video reproduction section, while a synchronization section maintains temporal synchronization between the reproductions. When the stream has a seamless boundary at which a seamless connection has been made with priority given to the video frames, the audio decoder section skips m of the audio frames immediately after the seamless boundary without decoding the m frame or frames (where the number m is an integer equal to or higher than 1).
    Type: Application
    Filed: July 22, 2008
    Publication date: April 30, 2009
    Inventor: Manabu KURODA
  • Patent number: 7502901
    Abstract: A semiconductor device has a processor, a first memory unit accessed by the processor, a plurality of page memory units obtained by partitioning a second memory unit which is accessible by the processor at a speed higher than the speed at which the first memory unit is accessible such that each of the page memory units has a storage capacity larger than the memory capacity of a line composing a cache memory, a tag adding, to each of the page memory units, tag information indicative of an address value in the first memory unit and priority information indicative of a replacement priority, a tag comparator for comparing, upon receipt of an access request from the processor, the address value in the first memory unit with the tag information held by the tag, and a replacement control unit for replacing the respective contents of the page memory units.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: March 10, 2009
    Assignee: Panasonic Corporation
    Inventors: Yoshihiro Koga, Manabu Kuroda, Noboru Asai, Kazutoshi Funahashi
  • Publication number: 20070286275
    Abstract: The present invention provides an integrated circuit for video/audio processing in which the design resources obtained by the development of video/audio devices can be used also for other types of video/audio devices. The integrated circuit comprises a microcomputer block 2 including a CPU, a stream I/O block 4 for inputting/outputting video and audio streams to and from an external device, a media processing block 3 for executing the media processing including at least one of the compression and decompression of the video and audio streams, etc. inputted to the stream I/O block 4, an AV IO block 5 for converting the video and audio streams subjected to the media processing in the media processing block 3 into video and audio signals and outputting these signals to the external device, etc, and a memory IF block 6 for controlling the data transfer between the microcomputer block 2, the stream I/C block 4, the media processing block 3 and the AV IO block 5 and an external memory 9.
    Type: Application
    Filed: April 1, 2005
    Publication date: December 13, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kozo Kimura, Tokuzo Kiyohara, Hiroshi Mizuno, Junji Michiyama, Tomohiko Kitamura, Ryoji Yamaguchi, Manabu Kuroda, Nobuhiko Yamada, Hideyuki Ohgose, Akifumi Yamana
  • Publication number: 20070058727
    Abstract: A coding section encodes plural pieces of video data sequentially. A measuring section measures a time period which the coding section has used for coding video data. When the time period measured by the measuring section is judged to be longer than a predetermined time based on a frame rate of the video data, a control section selects at least one piece of video data to be coded after the video data coded by the coding section out of the plural pieces of video data and generates a predetermined bit stream instead of coded data of the thus selected video data without allowing the coding section to encode the selected data.
    Type: Application
    Filed: September 6, 2006
    Publication date: March 15, 2007
    Inventors: Yoshihiro Nakahara, Keisuke Yorioka, Manabu Kuroda, Masakazu Kanda