Abstract: A processor of an image processing apparatus designates a target region. When an image is divided into a plurality of small regions which are smaller than a target region, the processor calculates a centroid obtained by weighting the central coordinates of each of the plurality of small regions by a likelihood of each of the plurality of the small regions and calculates a covariance matrix that depends on the centroid, the likelihood being based on characteristic value histograms of respective small regions inside and outside the target region. The processor detection unit detects a degree of separation according to a histogram, a likelihood, a centroid, and a covariance matrix. The processor also determines a post-update target region according to a degree of separation.

Abstract: A cache memory apparatus includes a primary cache memory using a 4-way set associative method and a secondary cache memory. When a parity error occurs in an entry in the primary cache memory, the way is prohibited from being replaced, and data related to the entry is written back from the primary cache memory to the secondary cache memory. Thereafter, the entry in the primary cache memory is made invalid, and the prohibition on the replacement of the way is released. When the secondary cache memory is accessed, the data written back is moved from the secondary cache memory to the entry into the primary cache memory to set a status before the parity error occurs.

Abstract: A cache memory apparatus includes a primary cache memory using a 4-way set associative method and a secondary cache memory. When a parity error occurs in an entry in the primary cache memory, the way is prohibited from being replaced, and data related to the entry is written back from the primary cache memory to the secondary cache memory. Thereafter, the entry in the primary cache memory is made invalid, and the prohibition on the replacement of the way is released. When the secondary cache memory is accessed, the data written back is moved from the secondary cache memory to the entry into the primary cache memory to set a status before the parity error occurs.

Abstract: A water-soluble coating composition for ship bottom comprising(A) 70 - 95 parts by weight of a vinyl copolymer of(a) 5 - 40% by weight of monoethylenic unsaturated monomer having at least one basic nitrogen atom,(b) 5 - 40% by weight of monoethylenic unsaturated monomer having at least one amide group, and(c) at least one monoethylenic unsaturated monomer copolymerizable with the said components (a) and (b), a total of the components (a), (b) and (c) being 100% by weight, and(B) 30 - 5 parts by weight of a water-soluble epoxy compound, shows excellent effect on controlling release rate of the toxic material from the primer coating layer and on inhibiting adhesion of marine organisms to ship bottoms, when applied to the primer coating layer of ship bottoms.