Patents by Inventor Manabu Oie

Manabu Oie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11899476
    Abstract: A gas flow measuring method is provided. A first pressure of a gas in a first and a second flow path is measured. A gas is supplied to the first and the second flow paths by repeating gas supply and stop of the gas supply, and a gas supply time is measured. A second pressure and a temperature of the gas in the first and the second flow path is measured, a third pressure of the gas in the second flow path is measured after the gas is exhausted from the second flow path, and a fourth pressure of the gas in the first and the second flow path is measured. The gas flow supplied to the first and the second flow path is calculated based on the first to fourth pressures and the temperature, and corrected based on a theoretical gas supply time and a calculated average time.
    Type: Grant
    Filed: February 16, 2021
    Date of Patent: February 13, 2024
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Risako Matsuda, Shinichiro Hayasaka, Manabu Oie, Keita Shouji
  • Patent number: 11742228
    Abstract: A substrate processing method of processing a substrate using a gas supplied to a chamber includes: (a) setting a threshold value of a pressure of the gas, which is a control target in a flow rate controller configured to measure the pressure of the gas supplied to the chamber and control a flow rate of the gas; (b) supplying the gas into the chamber; (c) measuring the pressure of the gas by the flow rate controller; (d) stopping the supply of the gas into of the chamber; (e) calculating a time when the pressure of the gas measured in (c) becomes equal to or higher than the threshold value; and (f) calculating a total flow rate of the gas supplied into the chamber based on the pressure of the gas measured in (c) and the time calculated in (e).
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: August 29, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Risako Matsuda, Shinobu Kinoshita, Manabu Oie, Keita Shouji
  • Publication number: 20220375724
    Abstract: A plasma processing method includes: (a) mounting a substrate including a first mask layer, which is a removal target, formed on a first layer with a metal-containing layer that is included therein to be partially exposed, on a stage disposed inside a processing container of the plasma processing apparatus; (b) supplying a process gas containing one or more of fluorocarbon gas and hydrofluorocarbon gas into the processing container; (c) supplying a first radio-frequency power that forms a plasma from the process gas into the processing container; (d) supplying a second radio-frequency power having a frequency lower than a frequency of the first radio-frequency power to the stage after a predetermined time is elapsed from stop of the first radio-frequency power; and (e) repeating (c) and (d).
    Type: Application
    Filed: May 20, 2022
    Publication date: November 24, 2022
    Applicant: Tokyo Electron Limited
    Inventors: Manabu OIE, Takanori BANSE, Toru HISAMATSU
  • Publication number: 20210287922
    Abstract: A substrate processing method of processing a substrate using a gas supplied to a chamber includes: (a) setting a threshold value of a pressure of the gas, which is a control target in a flow rate controller configured to measure the pressure of the gas supplied to the chamber and control a flow rate of the gas; (b) supplying the gas into the chamber; (c) measuring the pressure of the gas by the flow rate controller; (d) stopping the supply of the gas into of the chamber; (e) calculating a time when the pressure of the gas measured in (c) becomes equal to or higher than the threshold value; and (f) calculating a total flow rate of the gas supplied into the chamber based on the pressure of the gas measured in (c) and the time calculated in (e).
    Type: Application
    Filed: March 2, 2021
    Publication date: September 16, 2021
    Inventors: Risako MATSUDA, Shinobu KINOSHITA, Manabu OIE, Keita SHOUJI
  • Publication number: 20210263540
    Abstract: A gas flow measuring method is provided. A first pressure of a gas in a first and a second flow path is measured. A gas is supplied to the first and the second flow paths by repeating gas supply and stop of the gas supply, and a gas supply time is measured. A second pressure and a temperature of the gas in the first and the second flow path is measured, a third pressure of the gas in the second flow path is measured after the gas is exhausted from the second flow path, and a fourth pressure of the gas in the first and the second flow path is measured. The gas flow supplied to the first and the second flow path is calculated based on the first to fourth pressures and the temperature, and corrected based on a theoretical gas supply time and a calculated average time.
    Type: Application
    Filed: February 16, 2021
    Publication date: August 26, 2021
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Risako Matsuda, Shinichiro Hayasaka, Manabu Oie, Keita Shouji
  • Patent number: 10157784
    Abstract: Methods for integration of conformal barrier layers and Ru metal liners with Cu metallization in semiconductor manufacturing are described in several embodiments. According to one embodiment, the method includes providing a substrate containing a recessed feature, depositing a barrier layer in the recessed feature, depositing a Ru metal liner on the barrier layer, and exposing the substrate to an oxidation source gas to oxidize the barrier layer through the Ru metal liner. The method further includes filling the recessed feature with CuMn metal using an ionized physical vapor deposition (IPVD) process, heat-treating the substrate to diffuse Mn from the CuMn metal to the oxidized barrier layer, and reacting the diffused Mn with the oxidized barrier layer to form a Mn-containing diffusion barrier.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: December 18, 2018
    Assignee: Tokyo Electron Limited
    Inventors: Kai-Hung Yu, Manabu Oie, Kaoru Maekawa, Cory Wajda, Gerrit J. Leusink, Yuuki Kikuchi, Hiroaki Kawasaki, Hiroyuki Nagai
  • Publication number: 20170236752
    Abstract: Methods for integration of conformal barrier layers and Ru metal liners with Cu metallization in semiconductor manufacturing are described in several embodiments. According to one embodiment, the method includes providing a substrate containing a recessed feature, depositing a barrier layer in the recessed feature, depositing a Ru metal liner on the barrier layer, and exposing the substrate to an oxidation source gas to oxidize the barrier layer through the Ru metal liner. The method further includes filling the recessed feature with CuMn metal using an ionized physical vapor deposition (IPVD) process, heat-treating the substrate to diffuse Mn from the CuMn metal to the oxidized barrier layer, and reacting the diffused Mn with the oxidized barrier layer to form a Mn-containing diffusion barrier.
    Type: Application
    Filed: February 9, 2017
    Publication date: August 17, 2017
    Inventors: Kai-Hung L. Yu, Manabu Oie, Kaoru Maekawa, Cory Wajda, Gerrit J. Leusink, Yuuki Kikuchi, Hiroaki Kawasaki, Hiroyuki Nagai
  • Patent number: 9607888
    Abstract: Methods for integration of atomic layer deposition (ALD) of barrier layers and chemical vapor deposition (CVD) of Ru liners for Cu filling of narrow recessed features for semiconductor devices are disclosed in several embodiments. According to one embodiment, the method includes providing a substrate containing a recessed feature, depositing a conformal barrier layer by ALD in the recessed feature, where the barrier layer contains TaN or TaAlN, depositing a conformal Ru liner by CVD on the barrier layer, and filling the recessed feature with Cu metal.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: March 28, 2017
    Assignee: Tokyo Electron Limited
    Inventors: Kai-Hung Yu, Toshio Hasegawa, Tadahiro Ishizaka, Manabu Oie, Fumitaka Amano, Steven Consiglio, Cory Wajda, Kaoru Maekawa, Gert J. Leusink
  • Publication number: 20150221550
    Abstract: Methods for integration of atomic layer deposition (ALD) of barrier layers and chemical vapor deposition (CVD) of Ru liners for Cu filling of narrow recessed features for semiconductor devices are disclosed in several embodiments. According to one embodiment, the method includes providing a substrate containing a recessed feature, depositing a conformal barrier layer by ALD in the recessed feature, where the barrier layer contains TaN or TaAlN, depositing a conformal Ru liner by CVD on the barrier layer, and filling the recessed feature with Cu metal.
    Type: Application
    Filed: February 3, 2015
    Publication date: August 6, 2015
    Inventors: Kai-Hung Yu, Toshio Hasegawa, Tadahiro Ishizaka, Manabu Oie, Fumitaka Amano, Steven Consiglio, Cory Wajda, Kaoru Maekawa, Gert J. Leusink