Patents by Inventor Manabu Yumoto

Manabu Yumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050163352
    Abstract: In an image collating apparatus, a method of fingerprint input and collation (sensing method) is determined in accordance with confidentiality level of an application that is being executed at present, and fingerprint data is input either by sweep sensing method or area sensing method. Regardless of the input method, similarity score of the input fingerprint data to a read reference image is calculated for collation, and a result of determination is output.
    Type: Application
    Filed: December 30, 2004
    Publication date: July 28, 2005
    Inventors: Yasufumi Itoh, Manabu Yumoto, Manabu Onozaki
  • Patent number: 6894578
    Abstract: An irreversible circuit module includes a permanent magnet for providing a DC magnetic field for a magnetic member; an assembly having a magnetic member provided with a plurality of conductors being common on one end and serving as input and output terminals for high-frequency signals on the other end; a plurality of load capacitors connected to the conductors, the load capacitors being formed in a laminate having a conductor layer: a first transmission line connected to any of the conductors; and a second transmission line coupled magnetically to the first transmission line. The first transmission line and the second transmission line are included in the laminate. The assembly is received in a hole in the middle of the laminate.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: May 17, 2005
    Assignee: Hitachi Metals, Ltd.
    Inventors: Yasushi Kishimoto, Hiroyuki Itoh, Hideto Horiguchi, Manabu Yumoto, Youichi Takahashi, Shinichirou Takeuchi
  • Publication number: 20050084155
    Abstract: When first and second images are input, a partial image feature calculating unit calculates feature values of partial images of the two images. A maximum matching score position searching unit searches for a position of the second image that attains to the highest matching score with each of the partial images of the first image. A movement-vector-based similarity score calculating unit calculates similarity between the first and second images, using information related to that partial image whose movement vector has direction and length within a prescribed range, which movement vector representing positional relation between a reference position for measuring, for each of the partial images, the position of the partial image in the first image and the position of the maximum matching score corresponding to the partial image searched out by the maximum matching score position searching unit. The images as the object of collation may belong to the same category classified based on the feature values.
    Type: Application
    Filed: October 19, 2004
    Publication date: April 21, 2005
    Inventors: Manabu Yumoto, Yasufumi Itoh, Takashi Horiyama, Manabu Onozaki, Toshiya Okamoto
  • Publication number: 20050015630
    Abstract: A personal authentication processing device comprises: a personal biometric information storage section which stores predetermined personal biometric information; and a personal authentication processing section for receiving personal biometric information, performing personal authentication by comparing the received personal biometric information and the predetermined personal biometric information which is stored in the personal biometric information storage section, and outputting a true/false signal which indicates whether a result of the personal authentication is true or false.
    Type: Application
    Filed: May 28, 2004
    Publication date: January 20, 2005
    Inventors: Manabu Yumoto, Manabu Onozaki
  • Patent number: 6546542
    Abstract: A method of designing a data driven information processor employing self-timed pipeline control includes the steps of preparing a computer-readable library file in which is written designing parameters related to a functional block and processor of an apparatus that is the subject of design, setting a parameter value for each designing parameter according to a design specification, and executing on a computer a tool that rewrites each description of the parameter in the library file using a set parameter value and producing a register transfer level design description.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: April 8, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Manabu Yumoto, Munehiro Uratani
  • Patent number: 6526500
    Abstract: The data driven type information processing system has a branch unit and a junction unit in the input and output stages thereof, and includes a plurality of data driven type processors between the branch unit and the junction unit. The branch unit, the junction unit and the plurality of data driven type processors are coupled to one another via transmission paths. Each of the data driven type processors can process a unique instruction system. The junction unit collects data packets provided via the transmission paths and outputs the collected data packets to the outside of the system. In operation, when a data packet is provided to the system, the branch unit receives the data packet provided thereto and, according to an instruction code within the received data packet, selects a transmission path connected to a data driven type processor that can process an instruction system corresponding to the instruction code, and sends out the received data packet to the selected transmission path.
    Type: Grant
    Filed: January 14, 2000
    Date of Patent: February 25, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Manabu Yumoto, Manabu Onozaki, Tsuyoshi Muramatsu
  • Publication number: 20020023250
    Abstract: A method of designing a data driven information processor employing self-timed pipeline control includes the steps of preparing a computer-readable library file in which is written designing parameters related to a functional block and processor of an apparatus that is the subject of design, setting a parameter value for each designing parameter according to a design specification, and executing on a computer a tool that rewrites each description of the parameter in the library file using a set parameter value and producing a register transfer level design description.
    Type: Application
    Filed: June 8, 2001
    Publication date: February 21, 2002
    Inventors: Manabu Yumoto, Munehiro Uratani
  • Patent number: 5860019
    Abstract: A data driven information processor includes an input control processing portion having a plurality of outputs which receives an input data packet from an immediately preceding pipeline processing unit and outputs the input data packet to one output according to a prescribed allocation method, a plurality of processing portions connected in parallel to the plurality of outputs, and an output control portions which receives a data packet output from the plurality of processing portions and outputting the packet to an immediately succeeding pipeline processing unit. One of the plurality of processing units is selected by a counter or based on the content of the input data packet.
    Type: Grant
    Filed: July 10, 1996
    Date of Patent: January 12, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Manabu Yumoto
  • Patent number: 5802399
    Abstract: A data transfer control unit for controlling data transfer between a main processing part executing information processing and a memory part accessed by the main processing part has a bit width control part for controlling the bit width of the transferred data so that a first bit width of a port for data input/output on the main processing part side is matched with a second bit width, which is narrower than the first bit width, of a port for data input/output on the memory part side. This bit width control part has a function of converting the bit width of the data to the second bit width in case of data transfer from the main processing part to the memory part and a function of converting the same to the first bit width in case of data transfer from the memory part to the main processing part. Thus, the capacity of the memory part can be reduced by adjusting the bit width of the data transferred between the main processing part and the memory part.
    Type: Grant
    Filed: July 12, 1996
    Date of Patent: September 1, 1998
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Manabu Yumoto, Tsuyoshi Muramatsu, Souichi Miyata
  • Patent number: 5640525
    Abstract: A data-driven information processing device includes a program storage mechanism, a data pair generation mechanism, an operation processing mechanism, a circular pipeline for data transfer among the program storage mechanism, the pair data generation mechanism and the operation processing mechanism in a token format, and a data input/output control circuit connected to the circular pipeline. The data pair generation mechanism carries out a generation process of a data pair in a different manner depending upon whether the argument data companion to the argument data in an applied token is a constant or not. The data pair generation mechanism may include, for example, a constant data processing unit and a dynamic data pair generation mechanism.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: June 17, 1997
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Manabu Yumoto, Tsuyoshi Muramatsu
  • Patent number: 4812787
    Abstract: A lumped constant non-reciprocal circuit element such as a circulator or an isolator comprising a set of mutually insulated central conductors, a garnet plate not more than 0.6 mm in thickness, a ceramic substrate having a central bore for accommodating the garnet plate and patterned electrodes formed thereon, and a permanent magnet for applying a DC magnetic field to the garnet plate. Because of this structure, this circuit element is very thin with good insertion loss properties.
    Type: Grant
    Filed: October 20, 1987
    Date of Patent: March 14, 1989
    Assignee: Nippon Ferrite, Ltd.
    Inventors: Kenji Kuramoto, Manabu Yumoto