Abstract: A transmitter at a first location transmits the message at a symbol rate of the reference clock using a first carrier, whose phase is locked to a phase of the reference clock and whose frequency is a first integer times a frequency of the reference clock. It also transmits the message at the symbol rate of the reference clock using a second carrier, whose phase is locked to the phase of the reference clock and whose frequency is a second integer times the frequency of the reference clock. The second integer is unequal to the first integer. A receiver at a second location receives the message at the first carrier and at the second carrier, and accurately determines a time of a first phase difference between the first carrier and the second carrier. It determines a time of receiving the message from the time of the first phase difference.

Abstract: A wireless transmitter includes RF transmitters, an RF receiver, and a processor. It receives an ACK signal that specifies an RF mode and diversity information. The receiver receives a framed data packet that includes first PHY parameters. It determines second PHY parameters based on the diversity information, and replaces the first PHY parameters with the second PHY parameters. It transmits data via multiple diversity channels, according to the diversity information. A wireless receiver includes multiple RF receivers and an RF transmitter. It receives data in accordance with first diversity settings in a first RF mode. It determines a current reception condition and predicts a future reception condition from a dominant aggressor. It uses the future reception condition to determine a second RF mode with second diversity settings and includes the second diversity settings in an acknowledge signal.

Abstract: A radio communication device may include a measurement circuit configured to perform radio measurement to identify one or more cells of a combined CS-PS network in anticipation of circuit-switched orders, and a control circuit configured to identify a pending circuit-switched order supported by the combined CS-PS network while attached to a current network, and switch from the current network to the combined CS-PS network to engage in the pending circuit-switched using a selected cell of the one or more cells.

Abstract: In a wireless sensor actuator network, a time slot for transmission of a signal to a first device and a second device of the wireless sensor actuator network may be determined. During the time slot, the signal may be transmitted via a first frequency channel and first antenna to the first device and via a second frequency channel and second antenna to the second device in parallel. The first frequency channel may be different from the second frequency channel. Further, the first frequency channel and the second frequency channel may be selected based on a power level to transmit the signal to the first device, a power level to transmit the signal to the second device, an angle to transmit the signal to the first device, and an angle to transmit the signal to the second device.

Abstract: A wireless communication device is described in one example comprising a first communication module circuitry to communicatively couple the wireless communication device with a first network, the first communication module circuitry to receive a reject message from the first network to disable communications with the first network, a processor to store, in memory, information corresponding to the communications with the first network; and a second communication module circuitry to communicatively couple the wireless communication device with a second network, the second communication module circuitry to send the information to a remote service monitor, wherein the first communication module circuitry includes a first Subscriber Identity Module (SIM) or a first virtual SIM and the second communication module circuitry includes a second SIM or a second virtual SIM. Other embodiments may be described and/or claimed.

Abstract: A wireless communication device is described in one example comprising a first communication module circuitry to communicatively couple the wireless communication device with a first network, the first communication module circuitry to receive a reject message from the first network to disable communications with the first network, a processor to store, in memory, information corresponding to the communications with the first network; and a second communication module circuitry to communicatively couple the wireless communication device with a second network, the second communication module circuitry to send the information to a remote service monitor, wherein the first communication module circuitry includes a first Subscriber Identity Module (SIM) or a first virtual SIM and the second communication module circuitry includes a second SIM or a second virtual SIM. Other embodiments may be described and/or claimed.

Abstract: A radio communication device may include a measurement circuit configured to perform radio measurement to identify one or more cells of a combined CS-PS network in anticipation of circuit-switched orders, and a control circuit configured to identify a pending circuit-switched order supported by the combined CS-PS network while attached to a current network, and switch from the current network to the combined CS-PS network to engage in the pending circuit-switched using a selected cell of the one or more cells.

Abstract: A current mirror circuit is described. The current mirror circuit includes a first transistor and a second transistor. The gates of the first transistor and the second transistor are coupled at a bias voltage. The current mirror circuit also includes an auxiliary transistor that is biased into weak inversion by receiving the bias voltage at a gate of the auxiliary transistor after being reduced by an offset voltage. The sources of the first transistor, second transistor and auxiliary transistor are coupled together. A primary current from the drain of the second transistor is combined with an auxiliary current from the drain of the auxiliary transistor to produce an output current.

Abstract: New devices and methods capable of detecting a true Root-Mean-Square (RMS) power level of an analog input signal are disclosed. For example, an electronic circuit can include a squaring circuit that receives the analog input signal and processes the analog input signal so as to produce a squared-output of the analog input signal using an analog transfer function of the squaring circuit, and a square-root circuit that receives the squared-output and processes the squared-output using an analog transfer function of the square-root circuit so as to produce an analog RMS output signal representing the true RMS power level of the analog input signal.

Abstract: New devices and methods capable of detecting a true Root-Mean-Square (RMS) power level of an analog input signal are disclosed. For example, an electronic circuit can include a squaring circuit that receives the analog input signal and processes the analog input signal so as to produce a squared-output of the analog input signal using an analog transfer function of the squaring circuit, and a square-root circuit that receives the squared-output and processes the squared-output using an analog transfer function of the square-root circuit so as to produce an analog RMS output signal representing the true RMS power level of the analog input signal.

Abstract: A built-in self test (BiST) system is described. The BiST system includes a circuit-under-test. The BiST system also includes one or more embedded sensors. Each of the embedded sensors includes one or more switches connected to one or more nodes within the circuit-under-test. The BiST system further includes a signal generator. The BiST system also includes a bus interface. The bus interface provides for external access of the BiST system.

Abstract: Disclosed are circuits, techniques and methods for removing one or more harmonics from a waveform that has been mixed with a local oscillator. In one particular example, such a waveform may also be mixed with a second local oscillator at a different frequency and combined with the first mixed waveform to suppress and/or substantially remove the one or more harmonics.

Abstract: A current mirror circuit is described. The current mirror circuit includes a first transistor and a second transistor. The gates of the first transistor and the second transistor are coupled at a bias voltage. The current mirror circuit also includes an auxiliary transistor that is biased into weak inversion by receiving the bias voltage at a gate of the auxiliary transistor after being reduced by an offset voltage. The sources of the first transistor, second transistor and auxiliary transistor are coupled together. A primary current from the drain of the second transistor is combined with an auxiliary current from the drain of the auxiliary transistor to produce an output current.

Abstract: A differential Low Noise Amplifier (LNA) includes a first stage of resistive feedback amplifiers and second stage of complementary amplifiers, where the outputs of the first stage are coupled to the inputs of the second stage in a cross-coupled fashion. An inductive load, such as a transformer, combines signals output from the complementary amplifiers of the second stage. In one example, the LNA has an input impedance of less than 75 ohms, a noise factor of less than 2 dB, and a gain of more than 20 dB. Due to the low input impedance, the LNA is usable to amplify a signal received from a source having a similar low impedance without the use of an impedance matching network between the output of the source and the input of the LNA.

Abstract: A built-in self test (BiST) system is described. The BiST system includes a circuit-under-test. The BiST system also includes one or more embedded sensors. Each of the embedded sensors includes one or more switches connected to one or more nodes within the circuit-under-test. The BiST system further includes a signal generator. The BiST system also includes a bus interface. The bus interface provides for external access of the BiST system.

Abstract: Disclosed are circuits, techniques and methods for removing one or more harmonics from a waveform that has been mixed with a local oscillator. In one particular example, such a waveform may also be mixed with a second local oscillator at a different frequency and combined with the first mixed waveform to suppress and/or substantially remove the one or more harmonics.

Abstract: An integrated circuit with Built-in Self Test (BiST) is described. The integrated circuit includes a signal generator used to perform a BiST on the integrated circuit. The integrated circuit also includes a local oscillator used by the signal generator to generate one or more test signals used to perform the BiST on the integrated circuit.

Abstract: A differential Low Noise Amplifier (LNA) includes a first stage of resistive feedback amplifiers and second stage of complementary amplifiers, where the outputs of the first stage are coupled to the inputs of the second stage in a cross-coupled fashion. An inductive load, such as a transformer, combines signals output from the complementary amplifiers of the second stage. In one example, the LNA has an input impedance of less than 75 ohms, a noise factor of less than 2 dB, and a gain of more than 20 dB. Due to the low input impedance, the LNA is usable to amplify a signal received from a source having a similar low impedance without the use of an impedance matching network between the output of the source and the input of the LNA.

Abstract: A method for managing a network includes selecting a first database containing a topology of the network, as an active database that is accessible, selecting a second database as a working database for receiving topology updates, discovering a topology of the network and updating the second database with the discovered topology, and selecting the second database as the active database. Another method includes discovering the network, updating a topology representation of the network in a working database based on the discovering, simultaneous with the discovering and the updating providing access to a topology representation of the network in an active database, and exchanging connections of the working and active databases.