Patents by Inventor Manasi Deval

Manasi Deval has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200314011
    Abstract: Flexible schemes for adding rules to a NIC pipeline and associated apparatus. Multiple match-action tables are implemented in host memory of a platform defining actions to be taken for matching packet flows. A packet processing pipeline and an exact match (EM) cache is implemented on a network interface, such as a NIC, installed in the platform. A portion of the match-action entries in the host memory match-action tables are cached in the EM cache. Received packets are processed to generate a key that is used as a lookup for the EM cache. If a match is found, the action is taken. For a miss, the key is forwarded to the host software and the match-action tables are searched. For a match, the action is taken, and the entry is added to the EM cache. If no match is found, a new match-action entry is added to a match-action table. Aging-out mechanisms are used for the match-action tables and the EM cache. A multi-hash scheme is used to that supports a very large number of match-action entries.
    Type: Application
    Filed: June 16, 2020
    Publication date: October 1, 2020
    Inventors: Manasi Deval, Elazar Cohen, Shaul Yifrach, Parthasarathy Sarangam
  • Patent number: 10768841
    Abstract: Technologies for managing network statistic counters include a network interface controller (NIC) of a computing device configured to identify a statistic counter of and a software consumer associated with a received network packet and identify an active counter page as a function of the identified software consumer. The NIC is further configured to read a value of the statistic counter stored at a counter memory address of a corresponding counter identifier entry of the identified active counter page, increment a read value of the statistic counter, and write the incremented value of the statistic counter back to the counter memory address. Additionally, in response to detecting a notification triggering event, generating a notification message that includes a present value of the statistic counter and a present value of each of the other statistic counters of the active counter page, and transmit the generated notification message to the software consumer. Other embodiments are described herein.
    Type: Grant
    Filed: September 30, 2017
    Date of Patent: September 8, 2020
    Assignee: Intel Corporation
    Inventors: Linden Cornett, Chih-Jen Chang, Manasi Deval, Parthasarathy Sarangam, Naru D. Sundar, Padma Akkiraju, Alexander Nguyen
  • Publication number: 20200204503
    Abstract: Packets received non-contiguously from a network are processed by a network interface controller by coalescing received packet payload into receive buffers on a receive buffer queue and writing descriptors associated with the receive buffers for a same flow consecutively in a receive completion queue. System performance is optimized by reusing a small working set of provisioned receive buffers to minimize the memory footprint of memory allocated to store packet data. The remainder of the provisioned buffers are in an overflow queue and can be assigned to the network interface controller if the small working set of receive buffers is not sufficient to keep up with the received packet rate. The receive buffer queue can be refilled based on either timers or when the number of buffers in the receive buffer queue is below a configurable low watermark.
    Type: Application
    Filed: March 2, 2020
    Publication date: June 25, 2020
    Inventors: Linden CORNETT, Noam ELATI, Anjali Singhai JAIN, Parthasarathy SARANGAM, Eliel LOUZOUN, Manasi DEVAL
  • Publication number: 20200042350
    Abstract: Tenant support is provided in a multi-tenant configuration in a data center by a Physical Function driver communicating a virtual User Priority to a virtual traffic class mapper to a Virtual Function driver. The Physical Function driver configures the Network Interface Controller to map virtual User Priorities to Physical User Priorities and to enforce the Virtual Function's limited access to Traffic Classes. Data Center Bridging features assigned to the physical network interface controller are hidden by virtualizing user priorities and traffic classes. A virtual Data Center Bridging configuration is enabled for a Virtual Function, to provide access to the user priorities and traffic classes that are not visible to the Virtual Function that the Virtual Function may need.
    Type: Application
    Filed: October 7, 2019
    Publication date: February 6, 2020
    Inventors: Manasi DEVAL, Neerav PARIKH, Robert O. SHARP, Gregory J. BOWERS, Ryan E. HALL, Chinh T. CAO
  • Publication number: 20190356589
    Abstract: An apparatus, a method and a computer program for generating data packets according to a transport protocol from an application buffer comprising a plurality of data streams is provided. The apparatus comprises an input circuit configured to receive metadata comprising at least one of information about data packet types supported by the transport protocol, information about an offset and a length of the supported data packet types, and information about possible stream header start positions, possible payload start positions and possible offsets in the data streams. Further, the apparatus comprises a parsing circuit configured to identify offsets in an application buffer as possible segmentation points based on the metadata, to segment the application buffer at the possible segmentation points into segments for data packets, and to generate data packets according to the transport protocol based on the segments.
    Type: Application
    Filed: May 17, 2019
    Publication date: November 21, 2019
    Inventors: Eliel Louzoun, Manasi Deval, Stephen Doyle, Noam Elati, Patrick Fleming, Gregory Bowers
  • Publication number: 20190273693
    Abstract: Technologies for pacing network packet transmissions include a computing device. The computing device includes a compute engine and a network interface controller (NIC). The NIC is to select a first transmit descriptor from a window of transmit descriptors. The first transmit descriptor is associated with a packet stream. The NIC is also to identify a node of a plurality of nodes of a hierarchical scheduler. The node is associated with the selected first transmit descriptor. The NIC is also to determine whether the identified node has a target amount of transmission credits available and transmit, in response to a determination that the identified node has a target amount of transmission credits available, the network packet associated with the first transmit descriptor to a target computing device.
    Type: Application
    Filed: May 17, 2019
    Publication date: September 5, 2019
    Inventors: Manasi Deval, Gregory J. Bowers, Ryan E. Hall
  • Publication number: 20190260686
    Abstract: Examples described herein identify a flow that is considered heavy or high in transmit or receive rate. A filter rule can be assigned to the flow such that packets of the heavy flow are allocated to a queue and core for processing. Various queues and cores can be dedicated to processing received or transmitted packets of heavy flows and various queues and cores can be dedicated to process received or transmitted packets of non-heavy flows. An application acceleration layer can be used to migrate an application to a core that is to process received or transmitted packets of a heavy flow.
    Type: Application
    Filed: April 30, 2019
    Publication date: August 22, 2019
    Inventors: Gregory J. BOWERS, Kevin C. SCOTT, Manasi DEVAL
  • Patent number: 10355959
    Abstract: Examples are disclosed for determining or using server transaction latency information. In some examples, a network input/output device coupled to a server may be capable of time stamping information related to ingress request and egress response packets for a transaction. For these examples, elements of the server may be capable of determining transaction latency values based on the time stamped information. The determined transaction latency values may be used to monitor or manage operating characteristics of the server to include an amount of power provided to the server or an ability of the server to support one or more virtual servers. Other examples are described and claimed.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: July 16, 2019
    Assignee: INTEL CORPORATION
    Inventors: Manasi Deval, Jim Daubert, Eric K. Mann, Cong Li, Muralidhar Murali Rajappa, Anjaneya Reddy Chagam Reddy, David Wescott, Ramkumar Nagappan, Raed Kanjo
  • Patent number: 10346326
    Abstract: Generally, this disclosure relates to adaptive interrupt moderation. A method may include determining, by a host device, a number of connections between the host device and one or more link partners based, at least in part, on a connection identifier associated with each connection; determining, by the host device, a new interrupt rate based at least in part on a number of connections; updating, by the host device, an interrupt moderation timer with a value related to the new interrupt rate; and configuring the interrupt moderation timer to allow interrupts to occur at the new interrupt rate.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: July 9, 2019
    Assignee: Intel Corporation
    Inventors: Yadong Li, Linden Cornett, Manasi Deval, Anil Vasudevan, Parthasarathy Sarangam
  • Publication number: 20190199835
    Abstract: Embodiments include a method of opening a Quick User Datagram Protocol (UDP) Internet Connections (QUIC) socket on a computing platform, initializing QUIC packet processing of a hardware-based offloader, opening a QUIC connection to the offloader, and transmitting a first QUIC packet to the offloader over the QUIC connection. The hardware-based offloader encrypts and transmits the QUIC packet.
    Type: Application
    Filed: February 5, 2019
    Publication date: June 27, 2019
    Inventors: Manasi DEVAL, Gregory J. BOWERS, Joshua A. HAY, Maciej MACHNIKOWSKI, Natalia WOCHTMAN, Joanna MUNIAK
  • Publication number: 20190140967
    Abstract: Technologies for protocol-agnostic network packet segmentation includes determining whether a size of a payload of a network packet to be transmitted by the compute device exceeds a maximum size threshold and segmenting the payload into a plurality of segmented payloads if the size of the payload exceeds the maximum size of threshold. The payload may be segmented based on segmentation metadata associated with the network packet.
    Type: Application
    Filed: December 29, 2018
    Publication date: May 9, 2019
    Inventors: Manasi Deval, Gregory J. Bowers
  • Publication number: 20190114196
    Abstract: Examples include a method of live migrating a virtual device by creating a virtual device in a virtual machine, creating first and second interfaces for the virtual device, transferring data over the first interface, detecting a disconnection of the virtual device from the virtual machine, switching data transfers for the virtual device from the first interface to the second interface, detecting a reconnection of the virtual device to the virtual machine, and switching data transfers for the virtual device from the second interface to the first interface.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Inventors: Mitu AGGARWAL, Nrupal JANI, Manasi DEVAL, Kiran PATIL, Parthasarathy SARANGAM, Rajesh M. SANKARAN, Sanjay K. KUMAR, Utkarsh Y. KAKAIYA, Philip LANTZ, Kun TIAN
  • Publication number: 20190114195
    Abstract: Examples may include a method of instantiating a virtual machine, instantiating a virtual device to transmit data to and receive data from assigned resources of a shared physical device; and assigning the virtual device to the virtual machine, the virtual machine to transmit data to and receive data from the physical device via the virtual device.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Inventors: Nrupal JANI, Manasi DEVAL, Anjali SINGHAI, Parthasarathy SARANGAM, Mitu AGGARWAL, Neerav PARIKH, Alexander H. DUYCK, Kiran PATIL, Rajesh M. SANKARAN, Sanjay K. KUMAR, Utkarsh Y. KAKAIYA, Philip LANTZ, Kun TIAN
  • Publication number: 20190114194
    Abstract: Examples may include a method of instantiating a virtual machine; instantiating a virtual device to transmit data to and receive data from assigned resources of a shared physical device by receiving input data requesting assigned resources for the virtual device, allocating assigned resources to the virtual device based at least in part on the input data, and mapping a page location in an address space of the shared physical device for a selected one of the assigned resources to a page location in a memory-mapped input/output (MMIO) space of the virtual device; and assigning the virtual device to the virtual machine, the virtual machine to transmit data to and receive data from the physical device via the MMIO space of the virtual device.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Inventors: Nrupal JANI, Manasi DEVAL, Anjali SINGHAI, Parthasarathy SARANGAM, Mitu AGGARWAL, Neerav PARIKH, Alexander H. DUYCK, Kiran PATIL, Rajesh M. SANKARAN, Sanjay K. KUMAR, Utkarsh Y. KAKAIYA, Philip LANTZ, Kun TIAN
  • Publication number: 20190114283
    Abstract: Examples may include a computing platform having a host driver to get a packet descriptor of a received packet stored in a receive queue and to modify the packet descriptor from a first format to a second format. The computing platform also includes a guest virtual machine including a guest driver coupled to the host driver, the guest driver to receive the modified packet descriptor and to read a packet buffer stored in the receive queue using the modified packet descriptor, the packet buffer corresponding to the packet descriptor.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Applicants: Intel Corporation, Intel Corporation
    Inventors: Manasi DEVAL, Nrupal JANI, Anjali SINGHAI, Parthasarathy SARANGAM, Mitu AGGARWAL, Neerav PARIKH, Kiran PATIL, Rajesh M. SANKARAN, Sanjay K. KUMAR, Utkarsh Y. KAKAIYA, Philip LANTZ, Kun TIAN
  • Publication number: 20190108106
    Abstract: Examples include a method of performing failover of in an I/O architecture by allocating a first set of resources, associated with a first port of a physical device, to a virtual device, allocating a second set of resources, associated with a second port of the physical device, to the virtual device, assigning the virtual device to a virtual machine, activating the first set of resources, and transferring data between the virtual machine and the first port using the virtual device and the first set of resources. The method further includes detecting an error in the first set of resources, deactivating the first set of resources and activating the second set of resources, and transferring data between the virtual machine and the second port using the virtual device and the second set of resources.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 11, 2019
    Inventors: Mitu AGGARWAL, Nrupal JANI, Manasi DEVAL, Kiran PATIL, Parthasarathy SARANGAM, Rajesh M. SANKARAN, Sanjay K. KUMAR, Utkarsh Y. KAKAIYA, Philip LANTZ, Kun TIAN
  • Publication number: 20190107965
    Abstract: Examples may include a method of protecting memory and I/O transactions. The method includes allocating memory for an application, assigning a resource of a physical device to the application, assigning a process address space identifier to the assigned resource, creating a security enclave to protect the allocated memory of the application, and associating the security enclave with the process address space identifier to protect the allocated memory and the assigned resource.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 11, 2019
    Inventors: Manasi DEVAL, Nrupal JANI, Parthasarathy SARANGAM, Mitu AGGARWAL, Kiran PATIL, Rajesh M. SANKARAN, Sanjay K. KUMAR, Utkarsh Y. KAKAIYA, Philip LANTZ, Kun TIAN
  • Publication number: 20190044832
    Abstract: Technologies for configuring network quality of service (QoS) parameters include a computing device having a network controller with a scheduler tree. The computing device creates a QoS node for a QoS parameter in a shared layer of a driver QoS tree. The node has status set to exclusive and is associated with a timestamp. If the node is associated with multiple entities, the status may be set to shared. The computing device programs the network controller with a QoS node for the QoS parameter in a shared layer of the scheduler tree. The computing device determines whether available nodes in the shared layer are below a threshold. If so, the computing device finds an oldest exclusive QoS node in the shared layer of the driver QoS tree and moves the node to an exclusive layer of the driver QoS tree and the scheduler tree. Other embodiments are described and claimed.
    Type: Application
    Filed: June 29, 2018
    Publication date: February 7, 2019
    Inventors: Manasi Deval, Duke Hong, Yashaswini Raghuram Prathivadi Bhayankaram
  • Publication number: 20190044994
    Abstract: Technologies for accelerated HTTP message processing include a computing device having a network controller. The computing device may generate an HTTP message, frame the HTTP message to generate a transport protocol packet such as a TCP/IP packet or QUIC packet, and pass the transport protocol packet to the network controller. The network controller compresses the HTTP header of the HTTP message, encrypts the compressed HTTP message, and transmits the encrypted message to a remote device. The network controller may segment the transport protocol packet into multiple segmented packets. The network controller may receive transport protocol packets that include encrypted HTTP message. The network controller decrypts the encrypted HTTP message to generate a compressed HTTP message, decompresses the HTTP message, and steers the HTTP message to a receive queue based on contents of an HTTP header. The network controller may coalesce multiple transport protocol packets. Other embodiments are described and claimed.
    Type: Application
    Filed: June 29, 2018
    Publication date: February 7, 2019
    Inventors: Parthasarathy Sarangam, Manasi Deval, Gregory Bowers
  • Publication number: 20190044705
    Abstract: Technologies for accelerated QUIC packet processing include a computing device having a network controller. The computing device programs the network controller with an encryption key associated with a QUIC protocol connection. The computing device may pass a QUIC packet to the network controller, which encrypts a payload of the QUIC packet using the encryption key. The network controller may segment the QUIC packet into multiple segmented QUIC packets before encryption. The network controller transmits encrypted QUIC packets to a remote host. The network controller may receive encrypted QUIC packets from a remote host. The network controller decrypts the encrypted payload of received QUIC packets and may evaluate an assignment function with an entropy source in the received QUIC packets and forward the received QUIC packets to a receive queue based on the assignment function. Each receive queue may be associated with a processor core. Other embodiments are described and claimed.
    Type: Application
    Filed: June 29, 2018
    Publication date: February 7, 2019
    Inventors: Manasi Deval, Gregory Bowers