Patents by Inventor Manbir Singh Nag
Manbir Singh Nag has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11088618Abstract: A DC power supply, which includes a DC-DC converter and a linear voltage regulator, is disclosed. The DC-DC converter provides a DC power supply signal and a duty-cycle signal, which is based on a duty-cycle of the DC-DC converter. The DC-DC converter provides the DC power supply signal via a power supply output using a setpoint of the DC power supply. The linear voltage regulator provides a DC assist signal to assist the DC-DC converter when an adjusted setpoint of the DC power supply is greater than a voltage of the DC power supply signal. The linear voltage regulator provides the adjusted setpoint using the setpoint and the duty-cycle signal, such that the adjusted setpoint is directly related to the setpoint and to the duty-cycle.Type: GrantFiled: September 5, 2018Date of Patent: August 10, 2021Assignee: Qorvo US, Inc.Inventors: Manbir Singh Nag, Michael R. Kay
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Patent number: 10693420Abstract: A PA power supply, which includes a first ET power supply, power supply control circuitry, a first PMOS switching element, and a second PMOS switching element, is disclosed. During a first operating mode, the power supply control circuitry selects an OFF state of the first PMOS switching element, selects an ON state of the second PMOS switching element, and adjusts a voltage of a first switch control signal to maintain the OFF state of the first PMOS switching element using a voltage at a source of the first PMOS switching element and a voltage at a drain of the first PMOS switching element; the PA power supply provides a first PA power supply signal; and the first ET power supply provides a first ET power supply signal, such that the first PA power supply signal is based on the first ET power supply signal.Type: GrantFiled: August 31, 2018Date of Patent: June 23, 2020Assignee: Qorvo US, Inc.Inventors: Manbir Singh Nag, Michael R. Kay, Philippe Gorisse, Nadim Khlat
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Patent number: 10637399Abstract: A low modulation bandwidth (LMB) envelope tracking (ET) circuit is provided. The LMB ET circuit is configured to generate an ET modulated voltage at an output node based on a modulated target voltage for amplifying an LMB radio frequency (RF) signal. More specifically, the LMB ET circuit includes an amplifier configured to generate a modulated amplifier voltage based on the modulated target voltage and an offset circuit configured to raise the modulated amplifier voltage by a modulated offset voltage at the output node. The offset circuit is configured to generate the modulated offset voltage based on a modulated target offset voltage that is proportional to the modulated target voltage. As a result, it may be possible to maintain the ET modulated voltage at a defined voltage level for a defined duration such that the LMB RF signal can be amplified to a defined power level.Type: GrantFiled: July 30, 2018Date of Patent: April 28, 2020Assignee: Qorvo US, Inc.Inventors: Nadim Khlat, Manbir Singh Nag
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Publication number: 20200076297Abstract: A DC power supply, which includes a DC-DC converter and a linear voltage regulator, is disclosed. The DC-DC converter provides a DC power supply signal and a duty-cycle signal, which is based on a duty-cycle of the DC-DC converter. The DC-DC converter provides the DC power supply signal via a power supply output using a setpoint of the DC power supply. The linear voltage regulator provides a DC assist signal to assist the DC-DC converter when an adjusted setpoint of the DC power supply is greater than a voltage of the DC power supply signal. The linear voltage regulator provides the adjusted setpoint using the setpoint and the duty-cycle signal, such that the adjusted setpoint is directly related to the setpoint and to the duty-cycle.Type: ApplicationFiled: September 5, 2018Publication date: March 5, 2020Inventors: Manbir Singh Nag, Michael R. Kay
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Patent number: 10476437Abstract: A multimode voltage tracker circuit is provided. The multimode voltage tracker circuit is configured to generate a modulated voltage for amplifying a radio frequency (RF) signal(s), which may be modulated in a wide range of modulation bandwidth. In one non-limiting example, the multimode voltage tracker circuit can be configured to operate in a low modulation bandwidth (LMB) mode to generate an average power tracking (APT) modulated voltage for amplifying the RF signal(s) when the RF signal(s) is modulated in a lower modulation bandwidth (e.g., <50 KHz). As such, the multimode voltage tracker circuit can be adapted to support lower bandwidth communications in an Internet-of-Things (IoT) network with improved efficiency, stability, and performance.Type: GrantFiled: July 26, 2018Date of Patent: November 12, 2019Assignee: Qorvo US, Inc.Inventors: Manbir Singh Nag, Michael R. Kay, Nadim Khlat
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Publication number: 20190319584Abstract: A low modulation bandwidth (LMB) envelope tracking (ET) circuit is provided. The LMB ET circuit is configured to generate an ET modulated voltage at an output node based on a modulated target voltage for amplifying an LMB radio frequency (RF) signal. More specifically, the LMB ET circuit includes an amplifier configured to generate a modulated amplifier voltage based on the modulated target voltage and an offset circuit configured to raise the modulated amplifier voltage by a modulated offset voltage at the output node. The offset circuit is configured to generate the modulated offset voltage based on a modulated target offset voltage that is proportional to the modulated target voltage. As a result, it may be possible to maintain the ET modulated voltage at a defined voltage level for a defined duration such that the LMB RF signal can be amplified to a defined power level.Type: ApplicationFiled: July 30, 2018Publication date: October 17, 2019Inventors: Nadim Khlat, Manbir Singh Nag
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Publication number: 20190288645Abstract: A multimode voltage tracker circuit is provided. The multimode voltage tracker circuit is configured to generate a modulated voltage for amplifying a radio frequency (RF) signal(s), which may be modulated in a wide range of modulation bandwidth. In one non-limiting example, the multimode voltage tracker circuit can be configured to operate in a low modulation bandwidth (LMB) mode to generate an average power tracking (APT) modulated voltage for amplifying the RF signal(s) when the RF signal(s) is modulated in a lower modulation bandwidth (e.g., <50 KHz). As such, the multimode voltage tracker circuit can be adapted to support lower bandwidth communications in an Internet-of-Things (IoT) network with improved efficiency, stability, and performance.Type: ApplicationFiled: July 26, 2018Publication date: September 19, 2019Inventors: Manbir Singh Nag, Michael R. Kay, Nadim Khlat
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Publication number: 20180375475Abstract: A PA power supply, which includes a first ET power supply, power supply control circuitry, a first PMOS switching element, and a second PMOS switching element, is disclosed. During a first operating mode, the power supply control circuitry selects an OFF state of the first PMOS switching element, selects an ON state of the second PMOS switching element, and adjusts a voltage of a first switch control signal to maintain the OFF state of the first PMOS switching element using a voltage at a source of the first PMOS switching element and a voltage at a drain of the first PMOS switching element; the PA power supply provides a first PA power supply signal; and the first ET power supply provides a first ET power supply signal, such that the first PA power supply signal is based on the first ET power supply signal.Type: ApplicationFiled: August 31, 2018Publication date: December 27, 2018Inventors: Manbir Singh Nag, Michael R. Kay, Philippe Gorisse, Nadim Khlat
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Patent number: 10079575Abstract: A PA power supply, which includes a first ET power supply, power supply control circuitry, a first PMOS switching element, and a second PMOS switching element, is disclosed. During a first operating mode, the power supply control circuitry selects an OFF state of the first PMOS switching element, selects an ON state of the second PMOS switching element, and adjusts a voltage of a first switch control signal to maintain the OFF state of the first PMOS switching element using a voltage at a source of the first PMOS switching element and a voltage at a drain of the first PMOS switching element; the PA power supply provides a first PA power supply signal; and the first ET power supply provides a first ET power supply signal, such that the first PA power supply signal is based on the first ET power supply signal.Type: GrantFiled: December 19, 2016Date of Patent: September 18, 2018Assignee: Qorvo US, Inc.Inventors: Manbir Singh Nag, Michael R. Kay, Philippe Gorisse, Nadim Khlat
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Patent number: 9979295Abstract: A buck-boost DC-DC converter, which includes converter control circuitry, converter switching circuitry, and a first inductive element, is disclosed. The converter control circuitry provides a buck mode timing signal and a boost mode timing signal. The converter switching circuitry provides a switching output signal. During a buck mode of the buck-boost DC-DC converter, when a buck pulse-width of the switching output signal is less than a buck pulse-width threshold, the buck pulse-width is limited based on both the buck mode timing signal and the boost mode timing signal. During a boost mode of the buck-boost DC-DC converter, when a boost pulse-width of the switching output signal is less than a boost pulse-width threshold, the boost pulse-width is limited based on both the buck mode timing signal and the boost mode timing signal. The first inductive element receives and filters the switching output signal to provide a converter output signal.Type: GrantFiled: April 3, 2017Date of Patent: May 22, 2018Assignee: Qorvo US, Inc.Inventors: Michael R. Kay, Manbir Singh Nag
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Patent number: 9929696Abstract: A parallel amplifier and an offset capacitance voltage control loop are disclosed. The parallel amplifier has a parallel amplifier output, which is coupled to an envelope tracking power supply output via an offset capacitive element. The offset capacitive element has an offset capacitive voltage. The offset capacitance voltage control loop regulates the offset capacitive voltage, which is adjustable on a communications slot-to-communications slot basis.Type: GrantFiled: January 24, 2014Date of Patent: March 27, 2018Assignee: Qorvo US, Inc.Inventors: Nadim Khlat, Michael R. Kay, Manbir Singh Nag
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Publication number: 20170207705Abstract: A buck-boost DC-DC converter, which includes converter control circuitry, converter switching circuitry, and a first inductive element, is disclosed. The converter control circuitry provides a buck mode timing signal and a boost mode timing signal. The converter switching circuitry provides a switching output signal. During a buck mode of the buck-boost DC-DC converter, when a buck pulse-width of the switching output signal is less than a buck pulse-width threshold, the buck pulse-width is limited based on both the buck mode timing signal and the boost mode timing signal. During a boost mode of the buck-boost DC-DC converter, when a boost pulse-width of the switching output signal is less than a boost pulse-width threshold, the boost pulse-width is limited based on both the buck mode timing signal and the boost mode timing signal. The first inductive element receives and filters the switching output signal to provide a converter output signal.Type: ApplicationFiled: April 3, 2017Publication date: July 20, 2017Inventors: Michael R. Kay, Manbir Singh Nag
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Publication number: 20170179888Abstract: A PA power supply, which includes a first ET power supply, power supply control circuitry, a first PMOS switching element, and a second PMOS switching element, is disclosed. During a first operating mode, the power supply control circuitry selects an OFF state of the first PMOS switching element, selects an ON state of the second PMOS switching element, and adjusts a voltage of a first switch control signal to maintain the OFF state of the first PMOS switching element using a voltage at a source of the first PMOS switching element and a voltage at a drain of the first PMOS switching element; the PA power supply provides a first PA power supply signal; and the first ET power supply provides a first ET power supply signal, such that the first PA power supply signal is based on the first ET power supply signal.Type: ApplicationFiled: December 19, 2016Publication date: June 22, 2017Inventors: Manbir Singh Nag, Michael R. Kay, Philippe Gorisse, Nadim Khlat
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Patent number: 9614443Abstract: A buck-boost DC-DC converter, which includes converter control circuitry, converter switching circuitry, and a first inductive element, is disclosed. The converter control circuitry provides a buck mode timing signal and a boost mode timing signal. The converter switching circuitry provides a switching output signal. During a buck mode of the buck-boost DC-DC converter, when a buck pulse-width of the switching output signal is less than a buck pulse-width threshold, the buck pulse-width is limited based on both the buck mode timing signal and the boost mode timing signal. During a boost mode of the buck-boost DC-DC converter, when a boost pulse-width of the switching output signal is less than a boost pulse-width threshold, the boost pulse-width is limited based on both the buck mode timing signal and the boost mode timing signal. The first inductive element receives and filters the switching output signal to provide a converter output signal.Type: GrantFiled: July 24, 2015Date of Patent: April 4, 2017Assignee: Qorvo US, Inc.Inventors: Michael R. Kay, Manbir Singh Nag
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Patent number: 9515612Abstract: A parallel amplifier and an offset capacitance voltage control loop are disclosed. The parallel amplifier has a parallel amplifier output, which is coupled to an envelope tracking power supply output via an offset capacitive element. The offset capacitive element has an offset capacitive voltage. The offset capacitance voltage control loop regulates the offset capacitive voltage, which is adjustable on a communications slot-to-communications slot basis.Type: GrantFiled: January 24, 2014Date of Patent: December 6, 2016Assignee: RF Micro Devices, Inc.Inventors: Nadim Khlat, Michael R. Kay, Manbir Singh Nag
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Patent number: 9450539Abstract: A parallel amplifier and an offset capacitance voltage control loop are disclosed. The parallel amplifier has a parallel amplifier output, which is coupled to an envelope tracking power supply output via an offset capacitive element. The offset capacitive element has an offset capacitive voltage. The offset capacitance voltage control loop regulates the offset capacitive voltage, which is adjustable on a communications slot-to-communications slot basis.Type: GrantFiled: January 24, 2014Date of Patent: September 20, 2016Assignee: RF Micro Devices, Inc.Inventors: Nadim Khlat, Michael R. Kay, Manbir Singh Nag
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Patent number: 9379670Abstract: A parallel amplifier and an offset capacitance voltage control loop are disclosed. The parallel amplifier has a parallel amplifier output, which is coupled to an envelope tracking power supply output via an offset capacitive element. The offset capacitive element has an offset capacitive voltage. The offset capacitance voltage control loop regulates the offset capacitive voltage, which is adjustable on a communications slot-to-communications slot basis.Type: GrantFiled: January 24, 2014Date of Patent: June 28, 2016Assignee: RF Micro Devices, Inc.Inventors: Nadim Khlat, Michael R. Kay, Manbir Singh Nag
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Patent number: 9300252Abstract: A parallel amplifier and a parallel amplifier power supply are disclosed. The parallel amplifier power supply provides a parallel amplifier power supply signal, which is adjustable on a communications slot-to-communications slot basis. During envelope tracking, the parallel amplifier regulates an envelope power supply voltage based on the parallel amplifier power supply signal.Type: GrantFiled: January 24, 2014Date of Patent: March 29, 2016Assignee: RF Micro Devices, Inc.Inventors: Nadim Khlat, Michael R. Kay, Manbir Singh Nag
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Patent number: 9298198Abstract: A direct current (DC)-DC converter, which includes a parallel amplifier, a radio frequency (RF) trap, and a switching supply, is disclosed. The switching supply includes switching circuitry and a first inductive element. The parallel amplifier has a feedback input and a parallel amplifier output. The switching circuitry has a switching circuitry output. The first inductive element is coupled between the switching circuitry output and the feedback input. The RF trap is coupled between the parallel amplifier output and a ground.Type: GrantFiled: December 27, 2012Date of Patent: March 29, 2016Assignee: RF Micro Devices, Inc.Inventors: Michael R. Kay, Philippe Gorisse, Nadim Khlat, Andrew F. Folkmann, Manbir Singh Nag, Jean-Frederic Chiron
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Publication number: 20160028305Abstract: A buck-boost DC-DC converter, which includes converter control circuitry, converter switching circuitry, and a first inductive element, is disclosed. The converter control circuitry provides a buck mode timing signal and a boost mode timing signal. The converter switching circuitry provides a switching output signal. During a buck mode of the buck-boost DC-DC converter, when a buck pulse-width of the switching output signal is less than a buck pulse-width threshold, the buck pulse-width is limited based on both the buck mode timing signal and the boost mode timing signal. During a boost mode of the buck-boost DC-DC converter, when a boost pulse-width of the switching output signal is less than a boost pulse-width threshold, the boost pulse-width is limited based on both the buck mode timing signal and the boost mode timing signal. The first inductive element receives and filters the switching output signal to provide a converter output signal.Type: ApplicationFiled: July 24, 2015Publication date: January 28, 2016Inventors: Michael R. Kay, Manbir Singh Nag