Patents by Inventor Mandayam T. Raghunath

Mandayam T. Raghunath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6256660
    Abstract: A method and program product for a distributed system having a plurality of nodes and a switch network for passing messages between nodes, each message being sent from a source node to a target node. Each node is connected to the switch network by an adapter having a count register for adding the value of the packets in messages received by the adapter to the value in the count register and a threshold register for containing a desired threshold value. An interrupt generator generates interrupts when the value in the count register is equal to or greater than the value in the threshold register. The value in the threshold register may be changed under program control to enable or disable interrupts.
    Type: Grant
    Filed: April 8, 1997
    Date of Patent: July 3, 2001
    Assignee: International Business Machines Corporation
    Inventors: Rama K. Govindaraju, Mandayam T. Raghunath
  • Patent number: 6178174
    Abstract: A method, system, and associated program code and data structures are provided for a message processing system in which messages are transmitted from source nodes to destination nodes. An “eager” rendezvous transmission mode is disclosed in which early arrival buffering is provided at message destination nodes for a predetermined amount of data for each of a predetermined number of incoming messages. Relying on the presence of the early arrival buffering at a message destination node, a message source node can send a corresponding amount of message data to the destination node along with control information in an initial transmission. Any remaining message data is sent only upon receipt by the source node of an acknowledgement from the destination node indicating that the destination node is prepared to receive any remaining data.
    Type: Grant
    Filed: August 26, 1997
    Date of Patent: January 23, 2001
    Assignee: International Business Machines Corporation
    Inventors: Hubertus Franke, Rama K. Govindaraju, Pratap C. Pattnaik, Mandayam T. Raghunath, Robert M. Straub
  • Patent number: 6035335
    Abstract: A method, system, and associated program code and data structures are provided for a message processing system in which messages are transmitted from source nodes to destination nodes. An "eager" rendezvous transmission mode is disclosed in which early arrival buffering is provided at message destination nodes for a predetermined amount of data for each of a predetermined number of incoming messages. Relying on the presence of the early arrival buffering at a message destination node, a message source node can send a corresponding amount of message data to the destination node along with control information in an initial transmission. Any remaining message data is sent only upon receipt by the source node of an acknowledgement from the destination node indicating that the destination node is prepared to receive any remaining data.
    Type: Grant
    Filed: August 26, 1997
    Date of Patent: March 7, 2000
    Assignee: International Business Machines Corporation
    Inventors: Hubertus Franke, Rama K. Govindaraju, Pratap C. Pattnaik, Mandayam T. Raghunath, Robert M. Straub
  • Patent number: 6012121
    Abstract: An apparatus for a distributed system having a plurality of nodes and a switch network for passing messages between nodes, each message being sent from a source node to a target node. Each node is connected to the switch network by an adapter having a count register for adding the value of the packets in messages received by the adapter to the value in the count register and a threshold register for containing a desired threshold value. An interrupt generator generates interrupts when the value in the count register is equal to or greater than the value in the threshold register. The value in the threshold register may be changed under program control to enable or disable interrupts.
    Type: Grant
    Filed: April 8, 1997
    Date of Patent: January 4, 2000
    Assignee: International Business Machines Corporation
    Inventors: Rama K. Govindaraju, Mandayam T. Raghunath
  • Patent number: 5598570
    Abstract: The present invention comprises a computer system having a plurality of processors configured in an architecture having at least two subgraphs wherein at least a first subgraph and a second subgraph having the same topology and corresponding processors being stepwise complimentary for a data redistribution operation. Each processor of the computer system comprises a plurality of data-blocks and an executable program. The executable program performs the data redistribution operation by first exchanging in parallel the first half of the data-blocks of a processor in the first subgraph with the corresponding processor of the second subgraph. The redistributions of data with the corresponding stepwise complimentary processors are then simultaneously performed utilizing the full bandwidth of the data links. A reverse exchange of the first half of the data blocks between the processors of the first and the second subgraphs are then performed at the end.
    Type: Grant
    Filed: February 8, 1995
    Date of Patent: January 28, 1997
    Assignee: International Business Machines Corporation
    Inventors: Ching-Tien Ho, Mandayam T. Raghunath