Patents by Inventor Mandeep S. Chadha

Mandeep S. Chadha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for switching master/slave timing in a 1000BASE-T link without traffic disruption
    Patent number: 8923341
    Abstract: A method switches master/slave timing in a communication network without traffic disruption. The method includes a master device informing a slave of timing loss. The master device additionally begins transmitting with timing from a local reference clock and begins receive timing recovery. The slave freezes its receive timing recovery and locks its transmit clock. The master device transitions its transmit timing to use the recovered receive clock. The slave gradually switches to transmitting using its local clock signal. The method may be used in synchronous Ethernet networks.
    Type: Grant
    Filed: January 12, 2011
    Date of Patent: December 30, 2014
    Assignee: Vitesse Semiconductor Corporation
    Inventors: James D. Barnette, Mandeep S. Chadha, James A. McIntosh
  • METHOD FOR SWITCHING MASTER/SLAVE TIMING IN A 1000BASE-T LINK WITHOUT TRAFFIC DISRUPTION
    Publication number: 20110170645
    Abstract: A method switches master/slave timing in a communication network without traffic disruption. The method includes a master device informing a slave of timing loss. The master device additionally begins transmitting with timing from a local reference clock and begins receive timing recovery. The slave freezes its receive timing recovery and locks its transmit clock. The master device transitions its transmit timing to use the recovered receive clock. The slave gradually switches to transmitting using its local clock signal. The method may be used in synchronous Ethernet networks.
    Type: Application
    Filed: January 12, 2011
    Publication date: July 14, 2011
    Inventors: James D. Barnette, Mandeep S. Chadha, James A. McIntosh
  • SYSTEM AND METHOD FOR DETECTING EARLY LINK FAILURE IN AN ETHERNET NETWORK
    Publication number: 20090201821
    Abstract: A system and method for providing an early indication of link failure in an Ethernet network. In some embodiments an Ethernet PHY determines a link failure if the PHY loses descrambler synchronization, if remote receiver status is determined to indicate a remote receiver failure, or if link status indicates a link failure.
    Type: Application
    Filed: February 11, 2008
    Publication date: August 13, 2009
    Inventors: James D. Barnette, Jason C. Rock, Mandeep S. Chadha
  • Method for switching master/slave timing in a 1000Base-T link without traffic disruption
    Patent number: RE48130
    Abstract: A method switches master/slave timing in a communication network without traffic disruption. The method includes a master device informing a slave of timing loss. The master device additionally begins transmitting with timing from a local reference clock and begins receive timing recovery. The slave freezes its receive timing recovery and locks its transmit clock. The master device transitions its transmit timing to use the recovered receive clock. The slave gradually switches to transmitting using its local clock signal. The method may be used in synchronous Ethernet networks.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: July 28, 2020
    Assignee: Microsemi Storage Solutions, Inc.
    Inventors: James D Barnette, Mandeep S Chadha, James A McIntosh