Abstract: An apparatus includes a memory and a processor. The memory stores a test plan, a plurality of performed steps, a configuration for a test environment in which the test was performed, and a result of the test. The processor compares the plurality of performed steps to the plurality of planned steps, compares the configuration for a first test environment and the configuration for the second test environment, and determines whether an action of the plurality of actions resulted in a failure. The processor presents a first chart, a second chart, and a third chart the results of the comparisons and determination. The processor deploys an application corresponding to the test plan if each step of the plurality of planned steps was performed during the test, if the second test environment was configured according to the configuration for the first test environment, and if the failure was fixed.

Abstract: An apparatus includes a memory and a processor. The memory stores a test plan, a plurality of performed steps, a configuration for a test environment in which the test was performed, and a result of the test. The processor compares the plurality of performed steps to the plurality of planned steps, compares the configuration for a first test environment and the configuration for the second test environment, and determines whether an action of the plurality of actions resulted in a failure. The processor presents a first chart, a second chart, and a third chart the results of the comparisons and determination. The processor deploys an application corresponding to the test plan if each step of the plurality of planned steps was performed during the test, if the second test environment was configured according to the configuration for the first test environment, and if the failure was fixed.