Abstract: A hybrid power MOSFET having a low blocking-capability MOSFET and a high blocking-capability junction FET is disclosed. In accordance with the present invention, this cascode circuit has at least two high blocking-capability junction FETs which are electrically connected in parallel and whose gate connections are respectively electrically conductively connected to the source connection of the low blocking-capability MOSFET by means of a connecting line. Thus, a hybrid power MOSFET for a high current-carrying capacity is obtained whose design technology has been considerably simplified on account of the use of only one control line and n+1 chips.

Abstract: A hybrid power MOSFET, comprising a MOSFET and a junction FET, the MOSFET and the junction FET being electrically connected in series is disclosed. In accordance with the present invention, the hybrid power MOSFET is provided with a device for reducing the change in the gate voltage of the junction FET. Thus, a hybrid power MOSFET is obtained in which high over-voltages no longer arise and whose EMC response is much improved.

Abstract: A low-inductive busbar arrangement for a three-point phase module of a polyphase three-point power converter is provided. At least one turn-off semiconductor switched being provided for each switch of this three-point phase module and at least one diode being provided for each of the two neutral point diodes. Connection busbars of this three-point-phase module are distributed between three busbar planes of the low-inductive busbar arrangement, which are mutually electrically insulated from one another in each case with insulation layer and are arranged in a plan-parallel manner. A low-inductive busbar arrangement for a three-point phase module is thus obtained which has three busbar planes, irrespective of the series connection number.

Abstract: The invention provides a method by which losses are reduced during the commutation of a free-running, driven power converter valve (T2) of an invertor phase (2) to a current-accepting power converter valve (T1) of said invertor phase (2). The current-accepting power converter valve (T1) is switched on at the beginning of the commutation process and the free-running, driven power converter valve (T2) is rapidly switched off as soon as the value of its drain voltage (UD) is zero.

Abstract: The present invention relates to an active overvoltage protection apparatus for a bidirectional power switch which has two back-to-back in series connected semiconductor switches in the “common collector mode” topology. The overvoltage protection apparatus has a diode network which is linked to gate and emitter connections of the bidirectional power switch in the in such a manner as to provide a voltage clamping circuit for each of the semiconductor switches in the bidirectional power switch.

Abstract: A method for producing a microelectronic component of sandwich construction, which includes the steps of providing a first substrate which has a first conductor track plane, providing a plurality of semiconductor chips which have first contact faces electrically connected to the first conductor track plane, and second contact faces opposite the first sides. The method furthermore includes providing a second substrate which has a second conductor track plane with contact points, securing electrically conductive balls to the contact points of the second conductor track plane using an electrically conductive, flexible adhesive, applying an electrically conductive, flexible adhesive to the second contact faces of the plurality of semiconductor chips, and joining the first substrate and the second substrate together.

Abstract: A method and an apparatus for balancing the power loss in at least two electrically parallel-connected cascode circuits, which each have a low-blocking semiconductor switch composed of silicon and a high-blocking-capability semiconductor switch composed of silicon carbide is disclosed. According to the present invention, an output voltage of each low-blocking-capability semiconductor switch is detected, with correction values being established as a function of them, and being superimposed on corresponding control signals for the low-blocking-capability semiconductor switches. An unbalanced current distributor can thus be actively balanced.

Abstract: A hybrid power MOSFET having a low blocking-capability MOSFET and a high blocking-capability junction FET is disclosed. In accordance with the present invention, this cascode circuit has at least two high blocking-capability junction FETs which are electrically connected in parallel and whose gate connections are respectively electrically conductively connected to the source connection of the low blocking-capability MOSFET by means of a connecting line. Thus, a hybrid power MOSFET for a high current-carrying capacity is obtained whose design technology has been considerably simplified on account of the use of only one control line and n+1 chips.

Abstract: The present invention relates to an active overvoltage protection apparatus for a bidirectional power switch which has two back-to-back in series connected semiconductor switches in the “common collector mode” topology. The overvoltage protection apparatus has a diode network which is linked to gate and emitter connections of the bidirectional power switch in the in such a manner as to provide a voltage clamping circuit for each of the semiconductor switches in the bidirectional power switch.

Abstract: A microelectronic component of sandwich construction, that includes a first substrate with a first conductor track plane and a second substrate with a second conductor track plane, between which many semiconductor chips are disposed. The contacting of the second conductor track plane to the adjacent surface of the semiconductor chips is effected by fixed contacting means, in particular with the soldered connections, an electrically conductive adhesive, or electrically conductive balls. The microelectronic components of the invention are suitable in particular as power components and can be used for instance in inverters. The invention also relates to a method for producing the microelectronic component.

Abstract: The invention relates to a method for reducing losses during the commutation of a free-running, driven power converter valve (T2) of an invertor phase (2) to a current-accepting power converter valve (T1) of said invertor phase (2). According to the invention, the current-accepting power converter valve (T1) is switched on at the beginning of the commutation process and the free-running, driven power converter valve (T2) is rapidly switched off as soon as the value of its drain voltage (UD) is zero. The losses during the commutation process can thus be significantly reduced in a simple manner.

Abstract: The present invention relates to a converter motor with an energy recovery capability, comprising a motor and a self-commutating direct converter, the use of which results in a compact converter motor with an energy recovery capability, which can be used as a four-quadrant drive.

Abstract: Method and apparatus for controlling a turn-off power converter valve having at least two series connections. Each non-latching power semiconductor switch of this power converter valve has an active collector-emitter limiting circuit. When a rising edge of a drive signal that is provided arrives, a predetermined value of the reference limited voltage of the active collector-emitter limiting circuit is decreased to a low value and is increased to the predetermined value again during a turn-off operation. Using a switch-on command, it is possible to balance the voltage sharing on the non-latching power semiconductor switches of a turn-off power converter valve having at least two series connections.

Abstract: A circuit arrangement for precharging the capacitor connected to the output of a line-commutated power converter is described, where an element which limits the charging current of the capacitor to a level which is largely independent of the charging voltage is connected between a direct voltage output of the power converter and the respective terminal of the capacitor.

Abstract: A low-loss power inverter is provided. Each inverter phase includes an upper and a lower bridge half, each having two power semiconductor switches, with antiparallel-connected diodes, with one tie point of the power semiconductor switches being connected using an isolating diode to a tie point of a d.c. intermediate circuit, an auxiliary circuit consisting of an upper and a lower auxiliary switch and a resonant inductor is provided, and at least one resonant capacitor is provided for power semiconductor switches of the inverter phase. This yields a low-loss power inverter which combines the advantages of a three-point inverter with those of an ARCP inverter.