Abstract: A device for testing printed circuit boards (1) that have contact points (3) arranged in a pattern. The device includes a needle plate (4) that is parallel to the printed circuit board (1) and can be displaced towards the printed circuit board. The plate is equipped with fixed needles (6), whose points are arranged in the pattern of the contact points (3). The needles (6) and their points are arranged so that they can be repositioned in the (x,y) direction of the plane of the needle plate (4).

Abstract: A device for testing printed circuit boards (1) that have contact points (3) arranged in a pattern. The device includes needle plate (4) that is parallel to the printed circuit board (1) and can be displaced towards the printed circuit board. The plate is equipped with fixed needles (6), whose points are arranged in the pattern of the contact points (3). The needles (6) and their points are arranged so that they can be repositioned in the (x,y) direction of the plane of the needle plate (4).

Abstract: An instrument to test electronic components, the instrument including a drive unit electrically connecting the component and electrically driving the component to generate a field in the nearby space. The instrument also includes a test device electrically insulated from the component and mounted in its vicinity in order to measure the field generated by the component. The drive unit is designed to apply a voltage to the component. The test device includes an instrument amplifier measuring the voltage differential of two electrodes positioned at two sites in the electric field generated by the component. One of the electrodes is positioned near the component.

Abstract: A test device for testing an electronic board assembly with an exposed surface area with electrical connection locations to be contacted for testing includes a probe (32, 45) and a drive system for positioning the probe in orthogonal X and Y directions parallel with the surface area. The drive system includes a probe drive (11) for positioning the probe to contact a selected sub-area of the surface area, the probe drive being movable in all movement coordinates independently of any other probe drives in said test device. The sub-area is selected to include component locations (34) on the board assembly. Several probe drives (11) and several probes can be used at one time, each drive having a probe (13). The probe drives are supported so that the probes (13) can be moved to contact sub-areas adjacent to each other. The probe is an elongated needle with a contact tip and is mounted for pivotal movement.

Abstract: The invention concerns a test device for electronic board assemblies, said device comprising at least one probe which can be positioned parallel to the surface within the total area of an assembly by drive devices. The test device is characterized in that the drive devices comprise a probe drive which, operating in all directions of movement independently of other probe drives, positions the probe on a sub-area of the total area.

Abstract: A test method for verifying proper connection of a CMOS IC uses measurements of a transistor within the IC which can be done with a conventional transistor tester. The transistor has its base connected to a ground pin of the IC, its collector connected to a signal pin of the IC, and its emitter connected to another signal pin of the IC. A second collector of the transistor is connected to a supply voltage pin. The method uses a first step in which suitable voltages are applied to the emitter, base and first collector to turn the transistor on, whereupon the first collector current and second collector voltage are measured. In a second step, the same voltages are applied to the emitter and base as were applied in the first step and a voltage is applied to the second collector which is equal to the voltage measured there in the first step.

Abstract: A method for testing a semiconductor integrated circuit soldered into a printed circuit board makes use of the existence of parasitic transistors which occur on integrated circuits having diodes formed thereon. The method includes applying a voltage across the pins of the integrated circuit to be tested, measuring currents resulting from the voltage applied across the pins of the integrated circuit, connecting a transistor tester to selected pins of the integrated circuit, and determining typical control or switching characteristics of a parasitic transistor (1T, 2T) of the semiconducting integrated circuit (IC1, IC2). A commercial transistor tester is usable to perform the method.