Abstract: The invention relates to a method for the correction of video signals which are produced by pixel-by-pixel reading of picture cells from an optoelectronic sensor via two or more channels which have different transmission characteristics. In this case, the video signal is supplied to a processing circuit and is converted to digital pixel values. Estimated values for pixel values of another transmission channel are calculated from the digital pixel values of one transmission channel, and the estimated values and pixel values of one transmission channel are used to derive correction values, which correct differences between the estimated values and the pixel values of the relevant transmission channel, if necessary.

Abstract: The invention relates to a method for the correction of video signals which are produced by pixel-by-pixel reading of picture cells from an optoelectronic sensor via two or more channels which have different transmission characteristics. In this case, the video signal is supplied to a processing circuit and is converted to digital pixel values. Estimated values for pixel values of another transmission channel are calculated from the digital pixel values of one transmission channel, and the estimated values and pixel values of one transmission channel are used to derive correction values, which correct differences between the estimated values and the pixel values of the relevant transmission channel, if necessary.

Abstract: A device for processing video signals includes a noise reduction arrangement and a contour correction arrangement. To improve color correction, a color correction arrangement (11) is arranged between the noise reduction arrangement (10) and the contour correction arrangement (12).

Abstract: Synchronizing pulses are separated from a video signal played back from a magnetic tape recording. The individual synchronizing pulses are then inspected in a digital inspection circuit containing two generic array logic (GAL) units and a counter, operating in conjunction with a gate pulse generated from a electrically programmable read-only memory (EPROM) which is controlled by a counter reset by every validated synchronizing pulse. The inspection is in terms of phase and width of the synchronizing pulse. The pulses that pass inspection are utilized for the playback of the video signal, as are also other timing signals generated by the EPROM. The detection of a dropout in the playback demodulator interrupts the provision of inspected synchronizing signals and also prevents false clamping of the final sync separator, but clock pulses driving the counter that addresses the EPROM, together with a reset signal from the EPROM, maintain certain timing signals during the dropout.